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Searched refs:__raw_writeb (Results 1 – 25 of 102) sorted by relevance

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/arch/sh/boards/mach-sh03/
Drtc.c63 __raw_writeb(0, RTC_SEC1); __raw_writeb(0, RTC_SEC10); in get_cmos_time()
64 __raw_writeb(0, RTC_MIN1); __raw_writeb(0, RTC_MIN10); in get_cmos_time()
65 __raw_writeb(0, RTC_HOU1); __raw_writeb(0, RTC_HOU10); in get_cmos_time()
66 __raw_writeb(6, RTC_WEE1); in get_cmos_time()
67 __raw_writeb(1, RTC_DAY1); __raw_writeb(0, RTC_DAY10); in get_cmos_time()
68 __raw_writeb(1, RTC_MON1); __raw_writeb(0, RTC_MON10); in get_cmos_time()
69 __raw_writeb(0, RTC_YEA1); __raw_writeb(0, RTC_YEA10); in get_cmos_time()
70 __raw_writeb(0, RTC_YEA100); in get_cmos_time()
71 __raw_writeb(2, RTC_YEA1000); in get_cmos_time()
72 __raw_writeb(0, RTC_CTL); in get_cmos_time()
[all …]
/arch/arm/boot/compressed/
Dmmcif-sh7372.c53 __raw_writeb(0x04, PORT84CR); in mmc_loader()
54 __raw_writeb(0x04, PORT85CR); in mmc_loader()
55 __raw_writeb(0x04, PORT86CR); in mmc_loader()
56 __raw_writeb(0x04, PORT87CR); in mmc_loader()
57 __raw_writeb(0x04, PORT88CR); in mmc_loader()
58 __raw_writeb(0x04, PORT89CR); in mmc_loader()
59 __raw_writeb(0x04, PORT90CR); in mmc_loader()
60 __raw_writeb(0x04, PORT91CR); in mmc_loader()
61 __raw_writeb(0x04, PORT92CR); in mmc_loader()
67 __raw_writeb(0x14, PORT99CR); in mmc_loader()
Dsdhi-sh7372.c59 __raw_writeb(CR_FUNCTION1, PORT184CR); in mmc_loader()
61 __raw_writeb(CR_INPUT_ENABLE|CR_FUNCTION1, PORT179CR); in mmc_loader()
63 __raw_writeb(CR_FUNCTION1, PORT183CR); in mmc_loader()
65 __raw_writeb(CR_FUNCTION1, PORT182CR); in mmc_loader()
67 __raw_writeb(CR_FUNCTION1, PORT181CR); in mmc_loader()
69 __raw_writeb(CR_FUNCTION1, PORT180CR); in mmc_loader()
/arch/m68k/coldfire/
Dintc-simr.c72 __raw_writeb(irq - 128, MCFINTC2_SIMR); in intc_irq_mask()
74 __raw_writeb(irq - 64, MCFINTC1_SIMR); in intc_irq_mask()
76 __raw_writeb(irq, MCFINTC0_SIMR); in intc_irq_mask()
84 __raw_writeb(irq - 128, MCFINTC2_CIMR); in intc_irq_unmask()
86 __raw_writeb(irq - 64, MCFINTC1_CIMR); in intc_irq_unmask()
88 __raw_writeb(irq, MCFINTC0_CIMR); in intc_irq_unmask()
95 __raw_writeb(0x1 << ebit, MCFEPORT_EPFR); in intc_irq_ack()
109 __raw_writeb(v & ~(0x1 << ebit), MCFEPORT_EPDDR); in intc_irq_startup()
114 __raw_writeb(v | (0x1 << ebit), MCFEPORT_EPIER); in intc_irq_startup()
119 __raw_writeb(5, MCFINTC2_ICR0 + irq - 128); in intc_irq_startup()
[all …]
Dm54xx.c58 __raw_writeb(MCF_PAR_PSC_TXD | MCF_PAR_PSC_RXD, MCFGPIO_PAR_PSC0); in m54xx_uarts_init()
59 __raw_writeb(MCF_PAR_PSC_TXD | MCF_PAR_PSC_RXD | MCF_PAR_PSC_RTS_RTS, in m54xx_uarts_init()
61 __raw_writeb(MCF_PAR_PSC_TXD | MCF_PAR_PSC_RXD | MCF_PAR_PSC_RTS_RTS | in m54xx_uarts_init()
63 __raw_writeb(MCF_PAR_PSC_TXD | MCF_PAR_PSC_RXD, MCFGPIO_PAR_PSC3); in m54xx_uarts_init()
Dreset.c30 __raw_writeb(0xc0, MCFSIM_SYPCR); in mcf_cpu_reset()
40 __raw_writeb(MCF_RCR_SWRESET, MCF_RCR); in mcf_cpu_reset()
Dclk.c44 __raw_writeb(clk->slot, MCFPM_PPMCR0); in __clk_enable0()
49 __raw_writeb(clk->slot, MCFPM_PPMSR0); in __clk_disable0()
60 __raw_writeb(clk->slot, MCFPM_PPMCR1); in __clk_enable1()
65 __raw_writeb(clk->slot, MCFPM_PPMSR1); in __clk_disable1()
Dintc-2.c100 __raw_writeb(0x1 << (irq - EINT0), MCFEPORT_EPFR); in intc_irq_ack()
124 __raw_writeb(intc_intpri--, icraddr); in intc_irq_startup()
134 __raw_writeb(v & ~(0x1 << irq), MCFEPORT_EPDDR); in intc_irq_startup()
138 __raw_writeb(v | (0x1 << irq), MCFEPORT_EPIER); in intc_irq_startup()
Ddma_timer.c58 __raw_writeb(0x00, DTXMR0); in init_cf_dt_clocksource()
59 __raw_writeb(0x00, DTER0); in init_cf_dt_clocksource()
Dm5441x.c208 __raw_writeb(0x0f, MCFGPIO_PAR_UART0); in m5441x_uarts_init()
209 __raw_writeb(0x00, MCFGPIO_PAR_UART1); in m5441x_uarts_init()
210 __raw_writeb(0x00, MCFGPIO_PAR_UART2); in m5441x_uarts_init()
215 __raw_writeb(0x03, MCFGPIO_PAR_FEC); in m5441x_fec_init()
/arch/arm/mach-omap1/
Dfpga.c41 __raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_LO) in fpga_mask_irq()
44 __raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_HI) in fpga_mask_irq()
47 __raw_writeb((__raw_readb(INNOVATOR_FPGA_IMR2) in fpga_mask_irq()
74 __raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_LO) | (1 << irq)), in fpga_unmask_irq()
77 __raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_HI) in fpga_unmask_irq()
80 __raw_writeb((__raw_readb(INNOVATOR_FPGA_IMR2) in fpga_unmask_irq()
150 __raw_writeb(0, OMAP1510_FPGA_IMR_LO); in omap1510_fpga_init_irq()
151 __raw_writeb(0, OMAP1510_FPGA_IMR_HI); in omap1510_fpga_init_irq()
152 __raw_writeb(0, INNOVATOR_FPGA_IMR2); in omap1510_fpga_init_irq()
/arch/arm/mach-ebsa110/
Dcore.c37 __raw_writeb(1 << d->irq, IRQ_MCLR); in ebsa110_mask_irq()
42 __raw_writeb(1 << d->irq, IRQ_MSET); in ebsa110_unmask_irq()
57 __raw_writeb(0xff, IRQ_MCLR); in ebsa110_init_irq()
58 __raw_writeb(0x55, IRQ_MSET); in ebsa110_init_irq()
59 __raw_writeb(0x00, IRQ_MSET); in ebsa110_init_irq()
62 __raw_writeb(0xff, IRQ_MCLR); /* clear all interrupt enables */ in ebsa110_init_irq()
165 __raw_writeb(0x40, PIT_CTRL); in ebsa110_gettimeoffset()
193 __raw_writeb(0x40, PIT_CTRL); in ebsa110_timer_interrupt()
199 __raw_writeb(count & 0xff, PIT_T1); in ebsa110_timer_interrupt()
200 __raw_writeb(count >> 8, PIT_T1); in ebsa110_timer_interrupt()
[all …]
/arch/arm/mach-shmobile/include/mach/
Dmmc-mackerel.h18 __raw_writeb(0x10, PORT0CR); in mmc_init_progress()
19 __raw_writeb(0x10, PORT1CR); in mmc_init_progress()
20 __raw_writeb(0x10, PORT2CR); in mmc_init_progress()
21 __raw_writeb(0x10, PORT159CR); in mmc_init_progress()
/arch/sh/include/cpu-sh3/cpu/
Ddac.h23 __raw_writeb(v,DACR); in sh_dac_enable()
32 __raw_writeb(v,DACR); in sh_dac_disable()
37 if(channel) __raw_writeb(value,DADR1); in sh_dac_output()
38 else __raw_writeb(value,DADR0); in sh_dac_output()
/arch/sh/boards/mach-hp6xx/
Dpm.c63 __raw_writeb(stbcr | STBCR_STBY | STBCR_MSTP2, STBCR); in pm_enter()
94 __raw_writeb(stbcr, STBCR); in pm_enter()
119 __raw_writeb(0x1f, DACR); in hp6x0_pm_enter()
122 __raw_writeb(0x01, STBCR); in hp6x0_pm_enter()
125 __raw_writeb(0x7f , STBCR2); in hp6x0_pm_enter()
132 __raw_writeb(stbcr, STBCR); in hp6x0_pm_enter()
133 __raw_writeb(stbcr2, STBCR2); in hp6x0_pm_enter()
/arch/arm64/kernel/
Dio.c57 __raw_writeb(*(u8 *)from, to); in __memcpy_toio()
71 __raw_writeb(*(u8 *)from, to); in __memcpy_toio()
91 __raw_writeb(c, dst); in __memset_io()
103 __raw_writeb(c, dst); in __memset_io()
/arch/metag/include/asm/
Dio.h59 #define __raw_writeb __raw_writeb macro
60 static inline void __raw_writeb(u8 b, volatile void __iomem *addr) in __raw_writeb() function
126 #define metag_out8(b, addr) __raw_writeb(b, (volatile void __iomem *)(addr))
/arch/sh/kernel/cpu/
Dadc.c23 __raw_writeb(csr, ADCSR); in adc_single()
30 __raw_writeb(csr, ADCSR); in adc_single()
/arch/arm/mach-s3c24xx/
Dbast-irq.c75 __raw_writeb(temp, BAST_VA_PC104_IRQMASK); in bast_pc104_mask()
94 __raw_writeb(temp, BAST_VA_PC104_IRQMASK); in bast_pc104_unmask()
139 __raw_writeb(0x0, BAST_VA_PC104_IRQMASK); in bast_irq_init()
/arch/sh/include/mach-se/mach/
Dmrshpc.h48 __raw_writeb(0x00, PA_MRSHPC_MW2 + 0x206); in mrshpc_setup_windows()
49 __raw_writeb(0x42, PA_MRSHPC_MW2 + 0x200); in mrshpc_setup_windows()
/arch/arc/include/asm/
Dio.h71 #define __raw_writeb __raw_writeb macro
72 static inline void __raw_writeb(u8 b, volatile void __iomem *addr) in __raw_writeb() function
/arch/sh/cchips/hd6446x/
Dhd64461.c48 __raw_writeb(0x00, HD64461_PCC1CSCR); in hd64461_mask_and_ack_irq()
104 __raw_writeb(0x4c, HD64461_PCC1CSCIER); in setup_hd64461()
105 __raw_writeb(0x00, HD64461_PCC1CSCR); in setup_hd64461()
/arch/arm/mach-ep93xx/
Dts72xx.c90 __raw_writeb(bits, addr); in ts72xx_nand_hwcontrol()
94 __raw_writeb(cmd, chip->IO_ADDR_W); in ts72xx_nand_hwcontrol()
185 __raw_writeb(addr, TS72XX_RTC_INDEX_VIRT_BASE); in ts72xx_rtc_readbyte()
191 __raw_writeb(addr, TS72XX_RTC_INDEX_VIRT_BASE); in ts72xx_rtc_writebyte()
192 __raw_writeb(value, TS72XX_RTC_DATA_VIRT_BASE); in ts72xx_rtc_writebyte()
/arch/arm/mach-ep93xx/include/mach/
Duncompress.h24 static void __raw_writeb(unsigned char value, unsigned int ptr) in __raw_writeb() function
48 __raw_writeb(c, PHYS_UART_DATA); in putc()
/arch/sh/include/mach-common/mach/
Dmagicpanelr2.h22 #define SETBITS_OUTB(mask, reg) __raw_writeb(__raw_readb(reg) | mask, reg)
25 #define CLRBITS_OUTB(mask, reg) __raw_writeb(__raw_readb(reg) & ~mask, reg)

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