| /arch/arm/kernel/ |
| D | probes.h | 327 #define DECODE_HEADER(_type, _mask, _value, _regs) \ argument
329 {.bits = (_mask)}, \
338 #define DECODE_TABLE(_mask, _value, _table) \ argument
339 DECODE_HEADER(DECODE_TYPE_TABLE, _mask, _value, 0), \
348 #define DECODE_CUSTOM(_mask, _value, _decoder) \ argument
349 DECODE_HEADER(DECODE_TYPE_CUSTOM, _mask, _value, 0), \
358 #define DECODE_SIMULATEX(_mask, _value, _handler, _regs) \ argument
359 DECODE_HEADER(DECODE_TYPE_SIMULATE, _mask, _value, _regs), \
362 #define DECODE_SIMULATE(_mask, _value, _handler) \ argument
363 DECODE_SIMULATEX(_mask, _value, _handler, 0)
[all …]
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| /arch/sh/include/asm/ |
| D | atomic-grb.h | 58 unsigned int _mask = ~mask; in ATOMIC_OPS() local
71 : "r" (_mask) in ATOMIC_OPS()
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| /arch/frv/kernel/ |
| D | irq-mb93093.c | 80 static irqreturn_t fpga_interrupt(int irq, void *_mask) in fpga_interrupt() argument
82 uint16_t imr, mask = (unsigned long) _mask; in fpga_interrupt()
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| D | irq-mb93091.c | 82 static irqreturn_t fpga_interrupt(int irq, void *_mask) in fpga_interrupt() argument
84 uint16_t imr, mask = (unsigned long) _mask; in fpga_interrupt()
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| /arch/sh/kernel/cpu/sh2a/ |
| D | clock-sh7264.c | 80 #define DIV4(_reg, _bit, _mask, _flags) \ argument
81 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
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| D | clock-sh7269.c | 108 #define DIV4(_reg, _bit, _mask, _flags) \ argument
109 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
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| /arch/sh/kernel/cpu/sh4a/ |
| D | clock-sh7757.c | 65 #define DIV4(_bit, _mask, _flags) \ argument
66 SH_CLK_DIV4(&pll_clk, FRQCR, _bit, _mask, _flags)
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| D | clock-shx3.c | 64 #define DIV4(_bit, _mask, _flags) \ argument
65 SH_CLK_DIV4(&pll_clk, FRQMR1, _bit, _mask, _flags)
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| D | clock-sh7785.c | 69 #define DIV4(_bit, _mask, _flags) \ argument
70 SH_CLK_DIV4(&pll_clk, FRQMR1, _bit, _mask, _flags)
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| D | clock-sh7786.c | 70 #define DIV4(_bit, _mask, _flags) \ argument
71 SH_CLK_DIV4(&pll_clk, FRQMR1, _bit, _mask, _flags)
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| D | clock-sh7722.c | 120 #define DIV4(_reg, _bit, _mask, _flags) \ argument
121 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
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| D | clock-sh7366.c | 120 #define DIV4(_reg, _bit, _mask, _flags) \ argument
121 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
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| D | clock-sh7734.c | 72 #define DIV4(_reg, _bit, _mask, _flags) \ argument
73 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
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| D | clock-sh7723.c | 123 #define DIV4(_reg, _bit, _mask, _flags) \ argument
124 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
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| D | clock-sh7343.c | 117 #define DIV4(_reg, _bit, _mask, _flags) \ argument
118 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
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| D | clock-sh7724.c | 162 #define DIV4(_reg, _bit, _mask, _flags) \ argument
163 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
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| /arch/mn10300/unit-asb2364/ |
| D | irq-fpga.c | 57 static irqreturn_t fpga_interrupt(int irq, void *_mask) in fpga_interrupt() argument
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| /arch/arm/mach-shmobile/ |
| D | clock-sh73a0.c | 226 #define DIV4(_reg, _bit, _mask, _flags) \ argument
227 SH_CLK_DIV4(&pll1_clk, _reg, _bit, _mask, _flags)
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| D | clock-sh7372.c | 320 #define DIV4(_reg, _bit, _mask, _flags) \ argument
321 SH_CLK_DIV4(&pllc1_clk, _reg, _bit, _mask, _flags)
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| /arch/x86/kernel/ |
| D | smpboot.c | 287 cpumask_set_cpu((c1), cpu_##_m##_mask(c2)); \
288 cpumask_set_cpu((c2), cpu_##_m##_mask(c1)); \
|