| /arch/blackfin/include/asm/ |
| D | uaccess.h | 75 typeof(*(p)) __user *_p = (p); \
76 if (!access_ok(VERIFY_WRITE, _p, sizeof(*(_p)))) {\
80 switch (sizeof (*(_p))) { \
82 __put_user_asm(_x, _p, B); \
85 __put_user_asm(_x, _p, W); \
88 __put_user_asm(_x, _p, ); \
94 __put_user_asm(_xl, ((long __user *)_p)+0, ); \
95 __put_user_asm(_xh, ((long __user *)_p)+1, ); \
133 const typeof(*(ptr)) __user *_p = (ptr); \
134 const size_t ptr_size = sizeof(*(_p)); \
[all …]
|
| /arch/c6x/include/asm/ |
| D | unaligned.h | 24 const u8 *_p = p; in get_unaligned_le16() local
25 return _p[0] | _p[1] << 8; in get_unaligned_le16()
30 const u8 *_p = p; in get_unaligned_be16() local
31 return _p[0] << 8 | _p[1]; in get_unaligned_be16()
36 u8 *_p = p; in put_unaligned_le16() local
37 _p[0] = val; in put_unaligned_le16()
38 _p[1] = val >> 8; in put_unaligned_le16()
43 u8 *_p = p; in put_unaligned_be16() local
44 _p[0] = val >> 8; in put_unaligned_be16()
45 _p[1] = val; in put_unaligned_be16()
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| /arch/arm/include/asm/ |
| D | cacheflush.h | 403 char *_p = (char *)p; in __sync_cache_range_w() local
405 __cpuc_clean_dcache_area(_p, size); in __sync_cache_range_w()
406 outer_clean_range(__pa(_p), __pa(_p + size)); in __sync_cache_range_w()
417 char *_p = (char *)p; in __sync_cache_range_r() local
425 __cpuc_clean_dcache_area(_p, size); in __sync_cache_range_r()
428 outer_flush_range(__pa(_p), __pa(_p + size)); in __sync_cache_range_r()
433 __cpuc_flush_dcache_area(_p, size); in __sync_cache_range_r()
|
| /arch/frv/include/asm/ |
| D | uaccess.h | 122 typeof(*(ptr)) __user *_p = (ptr); \
125 _e = __range_ok(_p, sizeof(*_p)); \
127 _e = __put_user((x), _p); \
214 const typeof(*(ptr)) __user *_p = (ptr);\
217 _e = __range_ok(_p, sizeof(*_p)); \
219 _e = __get_user((x), _p); \
|
| /arch/arm/plat-samsung/include/plat/ |
| D | cpu-freq.h | 88 #define PLLVAL(_m, _p, _s) (((_m) << 12) | ((_p) << 4) | (_s)) argument
|
| /arch/frv/mm/ |
| D | mmu-context.c | 46 struct list_head *_p; in get_cxn() local
64 list_for_each(_p, &cxn_owners_lru) { in get_cxn()
65 p = list_entry(_p, mm_context_t, id_link); in get_cxn()
70 BUG_ON(_p == &cxn_owners_lru); in get_cxn()
|
| /arch/powerpc/include/asm/ |
| D | bitops.h | 59 volatile unsigned long *_p) \
62 unsigned long *p = (unsigned long *)_p; \
105 volatile unsigned long *_p) \
108 unsigned long *p = (unsigned long *)_p; \
|
| D | perf_event_server.h | 150 #define POWER_EVENT_ATTR(_name, _id) EVENT_ATTR(_name, _id, _p)
151 #define POWER_EVENT_PTR(_id) EVENT_PTR(_id, _p)
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| /arch/arm/mach-s3c24xx/include/mach/ |
| D | regs-clock.h | 18 #define S3C2410_PLLVAL(_m,_p,_s) ((_m) << 12 | ((_p) << 4) | ((_s))) argument
|
| /arch/x86/include/asm/ |
| D | io.h | 284 static inline void out##bwl##_p(unsigned type value, int port) \
290 static inline unsigned type in##bwl##_p(int port) \
|
| /arch/powerpc/platforms/pseries/ |
| D | cmm.c | 51 #define KB2PAGES(_p) ((_p)>>(PAGE_SHIFT-10)) argument
52 #define PAGES2KB(_p) ((_p)<<(PAGE_SHIFT-10)) argument
|
| /arch/avr32/include/asm/ |
| D | io.h | 146 __BUILD_IOPORT_SINGLE(bus, bwl, type, _p, SLOW_DOWN_IO)
|
| /arch/sh/include/asm/ |
| D | io.h | 182 __BUILD_IOPORT_SINGLE(bus, bwlq, type, _p, SLOW_DOWN_IO)
|
| /arch/mips/include/asm/ |
| D | io.h | 433 __BUILD_IOPORT_SINGLE(bus, bwlq, type, _p, SLOW_DOWN_IO) in BUILDIO_MEM()
|
| /arch/x86/kvm/ |
| D | emulate.c | 3670 #define DIP(_y, _i, _p) { .flags = (_y)|Intercept|CheckPerm, \ argument
3671 .intercept = x86_intercept_##_i, .check_perm = (_p) }
3681 #define IIP(_f, _e, _i, _p) \ argument
3683 .intercept = x86_intercept_##_i, .check_perm = (_p) }
3687 #define D2bvIP(_f, _i, _p) DIP((_f) | ByteOp, _i, _p), DIP(_f, _i, _p) argument
3690 #define I2bvIP(_f, _e, _i, _p) \ argument
3691 IIP((_f) | ByteOp, _e, _i, _p), IIP(_f, _e, _i, _p)
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