| /arch/cris/include/asm/ |
| D | bitops.h | 77 unsigned int *adr = (unsigned int *)addr; in test_and_set_bit() local
79 adr += nr >> 5; in test_and_set_bit()
82 retval = (mask & *adr) != 0; in test_and_set_bit()
83 *adr |= mask; in test_and_set_bit()
101 unsigned int *adr = (unsigned int *)addr; in test_and_clear_bit() local
103 adr += nr >> 5; in test_and_clear_bit()
106 retval = (mask & *adr) != 0; in test_and_clear_bit()
107 *adr &= ~mask; in test_and_clear_bit()
125 unsigned int *adr = (unsigned int *)addr; in test_and_change_bit() local
126 adr += nr >> 5; in test_and_change_bit()
[all …]
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| /arch/arm/mach-netx/ |
| D | xc.c | 83 static int xc_check_ptr(struct xc *x, unsigned long adr, unsigned int size) in xc_check_ptr() argument
85 if (adr >= NETX_PA_XMAC(x->no) && in xc_check_ptr()
86 adr + size < NETX_PA_XMAC(x->no) + XMAC_MEM_SIZE) in xc_check_ptr()
89 if (adr >= NETX_PA_XPEC(x->no) && in xc_check_ptr()
90 adr + size < NETX_PA_XPEC(x->no) + XPEC_MEM_SIZE) in xc_check_ptr()
100 unsigned int val, adr; in xc_patch() local
105 adr = *data++; in xc_patch()
107 if (xc_check_ptr(x, adr, 4) < 0) in xc_patch()
110 writel(val, (void __iomem *)io_p2v(adr)); in xc_patch()
|
| /arch/mips/pci/ |
| D | ops-nile4.c | 22 u32 adr, mask, err; in nile4_pcibios_config_access() local
51 adr = in nile4_pcibios_config_access()
56 adr = KSEG1ADDR(PCI_WINDOW1) | (busnum << 16) | (devfn << 8) | in nile4_pcibios_config_access()
60 *(u32 *) adr = *val; in nile4_pcibios_config_access()
62 *val = *(u32 *) adr; in nile4_pcibios_config_access()
|
| /arch/powerpc/include/asm/ |
| D | processor.h | 362 #define GET_FPEXC_CTL(tsk, adr) get_fpexc_mode((tsk), (adr)) argument
365 extern int get_fpexc_mode(struct task_struct *tsk, unsigned long adr);
368 #define GET_ENDIAN(tsk, adr) get_endian((tsk), (adr)) argument
371 extern int get_endian(struct task_struct *tsk, unsigned long adr);
374 #define GET_UNALIGN_CTL(tsk, adr) get_unalign_ctl((tsk), (adr)) argument
377 extern int get_unalign_ctl(struct task_struct *tsk, unsigned long adr);
|
| /arch/m32r/include/asm/ |
| D | cacheflush.h | 22 #define flush_icache_user_range(vma,pg,adr,len) _flush_cache_copyback_all() argument
28 #define flush_icache_user_range(vma,pg,adr,len) smp_flush_cache_all() argument
43 #define flush_icache_user_range(vma,pg,adr,len) _flush_cache_all() argument
57 #define flush_icache_user_range(vma,pg,adr,len) do { } while (0) argument
|
| /arch/mips/include/asm/txx9/ |
| D | tx4927.h | 216 static inline void txx9_clear64(__u64 __iomem *adr, __u64 bits) in txx9_clear64() argument
222 ____raw_writeq(____raw_readq(adr) & ~bits, adr); in txx9_clear64()
227 static inline void txx9_set64(__u64 __iomem *adr, __u64 bits) in txx9_set64() argument
233 ____raw_writeq(____raw_readq(adr) | bits, adr); in txx9_set64()
|
| /arch/ia64/sn/kernel/ |
| D | iomv.c | 75 volatile unsigned long *adr = pda->pio_write_status_addr; in __sn_mmiowb() local
78 while ((*adr & SH_PIO_WRITE_STATUS_PENDING_WRITE_COUNT_MASK) != val) in __sn_mmiowb()
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| D | io_acpi_init.c | 242 unsigned long long adr; in get_host_devfn() local
276 status = acpi_evaluate_integer(child, METHOD_NAME__ADR, NULL, &adr); in get_host_devfn()
285 slot = (adr >> 16) & 0xffff; in get_host_devfn()
286 function = adr & 0xffff; in get_host_devfn()
303 unsigned long long adr; in find_matching_device() local
313 &adr); in find_matching_device()
335 slot = (adr >> 16) & 0xffff; in find_matching_device()
336 function = adr & 0xffff; in find_matching_device()
|
| /arch/arm/mach-shmobile/ |
| D | headsmp.S | 60 adr r5, 1f @ array of per-cpu mpidr values
61 adr r6, 2f @ array of per-cpu functions
62 adr r7, 3f @ array of per-cpu arguments
|
| /arch/arm/kernel/ |
| D | head-common.S | 82 adr r3, __mmap_switched_data
153 adr r3, __lookup_processor_type_data
182 adr r0, str_lpae
194 adr r0, str_p1
198 adr r0, str_p2
|
| D | hyp-stub.S | 43 adr \reg2, .L__boot_cpu_mode_offset
55 adr \reg2, .L__boot_cpu_mode_offset
127 adr r7, __hyp_stub_vectors
|
| /arch/arm/mach-lpc32xx/ |
| D | suspend.S | 41 adr r0, tmp_stack_end
45 adr WORK1_REG, reg_bases
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| /arch/arm/mach-netx/include/mach/ |
| D | netx-regs.h | 169 #define PHY_CONTROL_PHY_ADDRESS(adr) ((adr) & 0xf) argument
252 #define MIIMU_REGADDR(adr) (((adr) & 0x1f) << 6) argument
253 #define MIIMU_PHYADDR(adr) (((adr) & 0x1f) << 11) argument
|
| /arch/arm/lib/ |
| D | backtrace.S | 43 adr r1, 1b
101 1006: adr r0, .Lbad
132 adr r3, .Lcr
136 adr r0, .Lfp
|
| D | io-acorn.S | 30 adr r0, .Liosl_warning
|
| D | call_with_stack.S | 38 adr lr, BSYM(1f)
|
| /arch/arm64/kernel/ |
| D | efi-entry.S | 89 adr x0, efi_stub_entry
90 adr x1, efi_stub_entry_end
|
| /arch/arm/vdso/ |
| D | datapage.S | 10 adr r0, .L_vdso_data_ptr
|
| /arch/arm/common/ |
| D | mcpm_head.S | 33 1901: adr r0, 1902b
37 adr r0, 1903b
41 adr r0, 1904b
52 THUMB( adr r12, BSYM(1f) )
75 adr r5, 3f
|
| /arch/unicore32/lib/ |
| D | backtrace.S | 40 adr r1, 1b
100 1006: adr r0, .Lbad
146 adr r0, .Lfp
152 adr r0, .Lcr
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| /arch/mn10300/include/asm/ |
| D | cacheflush.h | 150 #define flush_icache_user_range(vma, pg, adr, len) \ argument
151 flush_icache_range(adr, adr + len)
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| /arch/arm64/kvm/ |
| D | hyp.S | 243 adr x26, 1f
264 adr x26, 1f
288 adr x26, 1f
309 adr x26, 1f
333 adr x26, 1f
354 adr x26, 1f
378 adr x26, 1f
399 adr x26, 1f
480 adr x26, 1f
501 adr x26, 1f
[all …]
|
| /arch/arm/boot/compressed/ |
| D | head-shmobile.S | 30 adr sp, __tmp_stack + 256
58 adr r0, dtb_info
|
| /arch/arm/mach-socfpga/ |
| D | headsmp.S | 23 adr r0, 1f
|
| /arch/arm/mach-sti/ |
| D | headsmp.S | 27 adr r4, 1f
|