/arch/arm/boot/dts/ |
D | am33xx-clocks.dtsi | 2 * Device Tree Source for AM33xx clock data 12 #clock-cells = <0>; 13 compatible = "ti,mux-clock"; 20 #clock-cells = <0>; 21 compatible = "fixed-factor-clock"; 23 clock-mult = <1>; 24 clock-div = <1>; 28 #clock-cells = <0>; 29 compatible = "fixed-factor-clock"; 31 clock-mult = <1>; [all …]
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D | am43xx-clocks.dtsi | 2 * Device Tree Source for AM43xx clock data 12 #clock-cells = <0>; 13 compatible = "ti,mux-clock"; 20 #clock-cells = <0>; 21 compatible = "ti,mux-clock"; 28 #clock-cells = <0>; 29 compatible = "ti,mux-clock"; 36 #clock-cells = <0>; 37 compatible = "fixed-factor-clock"; 39 clock-mult = <1>; [all …]
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D | omap3xxx-clocks.dtsi | 2 * Device Tree Source for OMAP3 clock data 12 #clock-cells = <0>; 13 compatible = "fixed-clock"; 14 clock-frequency = <16800000>; 18 #clock-cells = <0>; 19 compatible = "ti,mux-clock"; 25 #clock-cells = <0>; 26 compatible = "ti,divider-clock"; 35 #clock-cells = <0>; 36 compatible = "ti,gate-clock"; [all …]
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D | omap24xx-clocks.dtsi | 2 * Device Tree Source for OMAP24xx clock data 12 #clock-cells = <0>; 13 compatible = "ti,composite-mux-clock"; 20 #clock-cells = <0>; 21 compatible = "ti,composite-clock"; 26 #clock-cells = <0>; 27 compatible = "ti,composite-mux-clock"; 34 #clock-cells = <0>; 35 compatible = "ti,composite-clock"; 42 #clock-cells = <0>; [all …]
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D | omap54xx-clocks.dtsi | 2 * Device Tree Source for OMAP5 clock data 12 #clock-cells = <0>; 13 compatible = "fixed-clock"; 14 clock-frequency = <12000000>; 18 #clock-cells = <0>; 19 compatible = "ti,gate-clock"; 26 #clock-cells = <0>; 27 compatible = "fixed-clock"; 28 clock-frequency = <32768>; 32 #clock-cells = <0>; [all …]
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D | keystone-clocks.dtsi | 2 * Device Tree Source for Keystone 2 clock tree 17 #clock-cells = <0>; 18 compatible = "ti,keystone,pll-mux-clock"; 23 clock-output-names = "mainmuxclk"; 27 #clock-cells = <0>; 28 compatible = "fixed-factor-clock"; 30 clock-div = <1>; 31 clock-mult = <1>; 32 clock-output-names = "chipclk1"; 36 #clock-cells = <0>; [all …]
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D | omap44xx-clocks.dtsi | 2 * Device Tree Source for OMAP4 clock data 12 #clock-cells = <0>; 13 compatible = "fixed-clock"; 14 clock-frequency = <59000000>; 18 #clock-cells = <0>; 19 compatible = "fixed-clock"; 20 clock-frequency = <12000000>; 24 #clock-cells = <0>; 25 compatible = "ti,gate-clock"; 32 #clock-cells = <0>; [all …]
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D | dra7xx-clocks.dtsi | 2 * Device Tree Source for DRA7xx clock data 12 #clock-cells = <0>; 13 compatible = "ti,dra7-atl-clock"; 18 #clock-cells = <0>; 19 compatible = "ti,dra7-atl-clock"; 24 #clock-cells = <0>; 25 compatible = "ti,dra7-atl-clock"; 30 #clock-cells = <0>; 31 compatible = "ti,dra7-atl-clock"; 36 #clock-cells = <0>; [all …]
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D | omap36xx-omap3430es2plus-clocks.dtsi | 2 * Device Tree Source for OMAP34xx/OMAP36xx clock data 12 #clock-cells = <0>; 13 compatible = "ti,composite-no-wait-gate-clock"; 20 #clock-cells = <0>; 21 compatible = "ti,composite-divider-clock"; 29 #clock-cells = <0>; 30 compatible = "ti,composite-clock"; 35 #clock-cells = <0>; 36 compatible = "fixed-factor-clock"; 38 clock-mult = <1>; [all …]
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D | ste-nomadik-stn8815.dtsi | 33 clock-names = "timclk", "apb_pclk"; 42 clock-names = "timclk", "apb_pclk"; 193 #clock-cells = <0>; 194 compatible = "fixed-clock"; 195 clock-frequency = <19200000>; 199 * The 2.4 MHz TIMCLK reference clock is active at 201 * divided by 8. This clock is used by the timers and 205 #clock-cells = <0>; 206 compatible = "fixed-factor-clock"; 207 clock-div = <8>; [all …]
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D | r8a7794.dtsi | 12 #include <dt-bindings/clock/r8a7794-clock.h> 30 clock-frequency = <1000000000>; 37 clock-frequency = <1000000000>; 59 clock-names = "fck"; 78 clock-names = "fck"; 107 clock-names = "sci_ick"; 116 clock-names = "sci_ick"; 125 clock-names = "sci_ick"; 134 clock-names = "sci_ick"; 143 clock-names = "sci_ick"; [all …]
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D | k2hk-clocks.dtsi | 4 * Keystone 2 Kepler/Hawking SoC clock nodes 13 #clock-cells = <0>; 14 compatible = "ti,keystone,pll-clock"; 16 clock-output-names = "arm-pll-clk"; 22 #clock-cells = <0>; 23 compatible = "ti,keystone,main-pll-clock"; 30 #clock-cells = <0>; 31 compatible = "ti,keystone,pll-clock"; 33 clock-output-names = "papllclk"; 39 #clock-cells = <0>; [all …]
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D | omap36xx-am35xx-omap3430es2plus-clocks.dtsi | 2 * Device Tree Source for OMAP36xx/AM35xx/OMAP34xx clock data 12 #clock-cells = <0>; 13 compatible = "fixed-factor-clock"; 15 clock-mult = <1>; 16 clock-div = <3>; 20 #clock-cells = <0>; 21 compatible = "fixed-factor-clock"; 23 clock-mult = <1>; 24 clock-div = <5>; 29 #clock-cells = <0>; [all …]
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D | k2l-clocks.dtsi | 4 * Keystone 2 lamarr SoC clock nodes 13 #clock-cells = <0>; 14 compatible = "ti,keystone,pll-clock"; 16 clock-output-names = "arm-pll-clk"; 22 #clock-cells = <0>; 23 compatible = "ti,keystone,main-pll-clock"; 30 #clock-cells = <0>; 31 compatible = "ti,keystone,pll-clock"; 33 clock-output-names = "papllclk"; 39 #clock-cells = <0>; [all …]
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D | omap34xx-omap36xx-clocks.dtsi | 2 * Device Tree Source for OMAP34XX/OMAP36XX clock data 12 #clock-cells = <0>; 13 compatible = "fixed-factor-clock"; 15 clock-mult = <1>; 16 clock-div = <1>; 20 #clock-cells = <0>; 21 compatible = "ti,omap3-interface-clock"; 28 #clock-cells = <0>; 29 compatible = "ti,omap3-interface-clock"; 36 #clock-cells = <0>; [all …]
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D | omap2430-clocks.dtsi | 2 * Device Tree Source for OMAP2430 clock data 13 #clock-cells = <0>; 14 compatible = "ti,composite-mux-clock"; 20 #clock-cells = <0>; 21 compatible = "ti,composite-clock"; 26 #clock-cells = <0>; 27 compatible = "ti,composite-mux-clock"; 34 #clock-cells = <0>; 35 compatible = "ti,composite-clock"; 40 #clock-cells = <0>; [all …]
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D | omap2420-clocks.dtsi | 2 * Device Tree Source for OMAP2420 clock data 13 #clock-cells = <0>; 14 compatible = "ti,composite-no-wait-gate-clock"; 21 #clock-cells = <0>; 22 compatible = "ti,composite-mux-clock"; 29 #clock-cells = <0>; 30 compatible = "ti,composite-clock"; 35 #clock-cells = <0>; 36 compatible = "ti,divider-clock"; 45 #clock-cells = <0>; [all …]
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D | omap3430es1-clocks.dtsi | 2 * Device Tree Source for OMAP3430 ES1 clock data 12 #clock-cells = <0>; 13 compatible = "ti,wait-gate-clock"; 20 #clock-cells = <0>; 21 compatible = "ti,divider-clock"; 29 #clock-cells = <0>; 30 compatible = "fixed-factor-clock"; 32 clock-mult = <1>; 33 clock-div = <1>; 37 #clock-cells = <0>; [all …]
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D | exynos5250.dtsi | 20 #include <dt-bindings/clock/exynos5250.h> 24 #include <dt-bindings/clock/exynos-audss-clk.h> 65 clock-frequency = <1700000000>; 71 clock-frequency = <1700000000>; 103 clock: clock-controller@10010000 { label 104 compatible = "samsung,exynos5250-clock"; 106 #clock-cells = <1>; 109 clock_audss: audss-clock-controller@3810000 { 110 compatible = "samsung,exynos5250-audss-clock"; 112 #clock-cells = <1>; [all …]
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D | exynos5420.dtsi | 16 #include <dt-bindings/clock/exynos5420.h> 20 #include <dt-bindings/clock/exynos-audss-clk.h> 62 clock-frequency = <1800000000>; 70 clock-frequency = <1800000000>; 78 clock-frequency = <1800000000>; 86 clock-frequency = <1800000000>; 94 clock-frequency = <1000000000>; 102 clock-frequency = <1000000000>; 110 clock-frequency = <1000000000>; 118 clock-frequency = <1000000000>; [all …]
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D | bcm11351.dtsi | 17 #include "dt-bindings/clock/bcm281xx.h" 231 #clock-cells = <1>; 232 clock-output-names = "frac_1m"; 238 #clock-cells = <1>; 239 clock-output-names = "tmon_1m"; 245 #clock-cells = <1>; 246 clock-output-names = "hub_timer", 254 #clock-cells = <1>; 255 clock-output-names = "sdio1", 267 #clock-cells = <1>; [all …]
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D | exynos4x12.dtsi | 57 clock: clock-controller@10030000 { label 58 compatible = "samsung,exynos4412-clock"; 60 #clock-cells = <1>; 68 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>; 69 clock-names = "fin_pll", "mct"; 114 clocks = <&clock CLK_TSADC>; 115 clock-names = "adc"; 136 clock-names = "clkout0", "clkout1", "clkout2", "clkout3", 138 clocks = <&clock CLK_OUT_DMC>, <&clock CLK_OUT_TOP>, 139 <&clock CLK_OUT_LEFTBUS>, <&clock CLK_OUT_RIGHTBUS>, [all …]
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D | ste-u300.dts | 37 #clock-cells = <0>; 38 compatible = "fixed-clock"; 39 clock-frequency = <32768>; 42 #clock-cells = <0>; 43 compatible = "fixed-clock"; 44 clock-frequency = <13000000>; 48 #clock-cells = <0>; 50 clock-type = <0>; /* Slow */ 51 clock-id = <0>; 55 #clock-cells = <0>; [all …]
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D | am35xx-clocks.dtsi | 2 * Device Tree Source for OMAP3 clock data 12 #clock-cells = <0>; 13 compatible = "ti,am35xx-gate-clock"; 20 #clock-cells = <0>; 21 compatible = "ti,gate-clock"; 28 #clock-cells = <0>; 29 compatible = "ti,am35xx-gate-clock"; 36 #clock-cells = <0>; 37 compatible = "ti,gate-clock"; 44 #clock-cells = <0>; [all …]
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/arch/sh/kernel/cpu/sh4a/ |
D | Makefile | 24 clock-$(CONFIG_CPU_SUBTYPE_SH7757) := clock-sh7757.o 25 clock-$(CONFIG_CPU_SUBTYPE_SH7763) := clock-sh7763.o 26 clock-$(CONFIG_CPU_SUBTYPE_SH7770) := clock-sh7770.o 27 clock-$(CONFIG_CPU_SUBTYPE_SH7780) := clock-sh7780.o 28 clock-$(CONFIG_CPU_SUBTYPE_SH7785) := clock-sh7785.o 29 clock-$(CONFIG_CPU_SUBTYPE_SH7786) := clock-sh7786.o 30 clock-$(CONFIG_CPU_SUBTYPE_SH7343) := clock-sh7343.o 31 clock-$(CONFIG_CPU_SUBTYPE_SH7722) := clock-sh7722.o 32 clock-$(CONFIG_CPU_SUBTYPE_SH7723) := clock-sh7723.o 33 clock-$(CONFIG_CPU_SUBTYPE_SH7724) := clock-sh7724.o [all …]
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