Home
last modified time | relevance | path

Searched refs:cm_base (Results 1 – 9 of 9) sorted by relevance

/arch/arm/mach-integrator/
Dcore.c37 static void __iomem *cm_base; variable
44 return readl(cm_base + INTEGRATOR_HDR_CTRL_OFFSET); in cm_get()
58 val = readl(cm_base + INTEGRATOR_HDR_CTRL_OFFSET) & ~mask; in cm_control()
59 writel(val | set, cm_base + INTEGRATOR_HDR_CTRL_OFFSET); in cm_control()
100 writel(0xffffffffU, cm_base + INTEGRATOR_HDR_IC_OFFSET + in cm_clear_irqs()
118 cm_base = of_iomap(cm, 0); in cm_init()
119 if (!cm_base) { in cm_init()
124 val = readl(cm_base + INTEGRATOR_HDR_ID_OFFSET); in cm_init()
/arch/arm/mach-omap2/
Dcm44xx.c30 return readl_relaxed(cm_base + inst + reg); in omap4_cm1_read_inst_reg()
36 writel_relaxed(val, cm_base + inst + reg); in omap4_cm1_write_inst_reg()
Dcm_common.c31 void __iomem *cm_base; variable
45 cm_base = cm; in omap2_set_globals_cm()
Dcm2xxx_3xxx.h55 return readl_relaxed(cm_base + module + idx); in omap2_cm_read_mod_reg()
60 writel_relaxed(val, cm_base + module + idx); in omap2_cm_write_mod_reg()
Dcm.h26 extern void __iomem *cm_base;
Dcm2xxx.c214 if (idlest_reg < cm_base || idlest_reg > (cm_base + 0x0fff)) in omap2xxx_cm_split_idlest_reg()
228 offs = idlest_reg - cm_base; in omap2xxx_cm_split_idlest_reg()
Dcm33xx.c53 return readl_relaxed(cm_base + inst + idx); in am33xx_cm_read_reg()
59 writel_relaxed(val, cm_base + inst + idx); in am33xx_cm_write_reg()
Dcm3xxx.c126 if (idlest_reg < (cm_base + OMAP3430_IVA2_MOD) || in omap3xxx_cm_split_idlest_reg()
127 idlest_reg > (cm_base + 0x1ffff)) in omap3xxx_cm_split_idlest_reg()
141 offs = idlest_reg - cm_base; in omap3xxx_cm_split_idlest_reg()
Dcminst44xx.c70 _cm_bases[OMAP4430_CM1_PARTITION] = cm_base; in omap_cm_base_init()