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/arch/arm/mach-imx/devices/
DKconfig1 config IMX_HAVE_PLATFORM_FEC
5 config IMX_HAVE_PLATFORM_FLEXCAN
8 config IMX_HAVE_PLATFORM_FSL_USB2_UDC
11 config IMX_HAVE_PLATFORM_GPIO_KEYS
14 config IMX_HAVE_PLATFORM_IMX21_HCD
17 config IMX_HAVE_PLATFORM_IMX27_CODA
21 config IMX_HAVE_PLATFORM_IMX2_WDT
24 config IMX_HAVE_PLATFORM_IMXDI_RTC
27 config IMX_HAVE_PLATFORM_IMX_FB
30 config IMX_HAVE_PLATFORM_IMX_I2C
[all …]
/arch/blackfin/mach-bf538/
DKconfig10 config IRQ_PLL_WAKEUP
13 config IRQ_DMA0_ERROR
16 config IRQ_PPI_ERROR
19 config IRQ_SPORT0_ERROR
22 config IRQ_SPORT1_ERROR
25 config IRQ_SPI0_ERROR
28 config IRQ_UART0_ERROR
31 config IRQ_RTC
34 config IRQ_PPI
37 config IRQ_SPORT0_RX
[all …]
/arch/arm/mach-at91/
Dsam9_smc.c27 struct sam9_smc_config *config) in sam9_smc_cs_write_mode() argument
29 __raw_writel(config->mode in sam9_smc_cs_write_mode()
30 | AT91_SMC_TDF_(config->tdf_cycles), in sam9_smc_cs_write_mode()
35 struct sam9_smc_config *config) in sam9_smc_write_mode() argument
37 sam9_smc_cs_write_mode(AT91_SMC_CS(id, cs), config); in sam9_smc_write_mode()
42 struct sam9_smc_config *config) in sam9_smc_cs_configure() argument
46 __raw_writel(AT91_SMC_NWESETUP_(config->nwe_setup) in sam9_smc_cs_configure()
47 | AT91_SMC_NCS_WRSETUP_(config->ncs_write_setup) in sam9_smc_cs_configure()
48 | AT91_SMC_NRDSETUP_(config->nrd_setup) in sam9_smc_cs_configure()
49 | AT91_SMC_NCS_RDSETUP_(config->ncs_read_setup), in sam9_smc_cs_configure()
[all …]
/arch/blackfin/mach-bf548/
DKconfig1 config BF542
4 config BF544
7 config BF547
10 config BF548
13 config BF549
17 config BF54xM
21 config BF54x
31 config DEB_DMA_URGENT
38 config BF548_ATAPI_ALTERNATIVE_PORT
57 config UART2_DMA_RX_ON_DMA18
[all …]
/arch/blackfin/mach-bf561/
DKconfig11 config BF561_COREB
21 config IRQ_PLL_WAKEUP
24 config IRQ_DMA1_ERROR
27 config IRQ_DMA2_ERROR
30 config IRQ_IMDMA_ERROR
33 config IRQ_PPI0_ERROR
36 config IRQ_PPI1_ERROR
39 config IRQ_SPORT0_ERROR
42 config IRQ_SPORT1_ERROR
45 config IRQ_SPI_ERROR
[all …]
/arch/blackfin/mach-bf527/
DKconfig1 config BF52x
19 config BF527_SPORT0_PORTF
24 config BF527_SPORT0_PORTG
37 config BF527_SPORT0_TSCLK_PG10
42 config BF527_SPORT0_TSCLK_PG14
54 config BF527_UART1_PORTF
59 config BF527_UART1_PORTG
71 config BF527_NAND_D_PORTF
76 config BF527_NAND_D_PORTH
83 config BFIN_HYSTERESIS_CONTROL
[all …]
/arch/blackfin/mach-bf518/
DKconfig1 config BF51x
22 config BF518_PWM_ALL_PORTF
27 config BF518_PWM_PORTF_PORTG
43 config BF518_PWM_SYNC_PF7
45 config BF518_PWM_SYNC_PF15
57 config BF518_PWM_TRIPB_PG10
59 config BF518_PWM_TRIPB_PG14
73 config BF518_PPI_TMR_PG5
78 config BF518_PPI_TMR_PG12
86 config BFIN_HYSTERESIS_CONTROL
[all …]
/arch/avr32/mach-at32ap/
Dhsmc.c32 void smc_set_timing(struct smc_config *config, in smc_set_timing() argument
41 config->ncs_read_setup = 0; in smc_set_timing()
42 config->nrd_setup = 0; in smc_set_timing()
43 config->ncs_write_setup = 0; in smc_set_timing()
44 config->nwe_setup = 0; in smc_set_timing()
45 config->ncs_read_pulse = 0; in smc_set_timing()
46 config->nrd_pulse = 0; in smc_set_timing()
47 config->ncs_write_pulse = 0; in smc_set_timing()
48 config->nwe_pulse = 0; in smc_set_timing()
49 config->read_cycle = 0; in smc_set_timing()
[all …]
/arch/blackfin/mach-bf537/
DKconfig10 config IRQ_PLL_WAKEUP
13 config IRQ_DMA_ERROR
16 config IRQ_ERROR
19 config IRQ_RTC
22 config IRQ_PPI
25 config IRQ_SPORT0_RX
28 config IRQ_SPORT0_TX
31 config IRQ_SPORT1_RX
34 config IRQ_SPORT1_TX
37 config IRQ_TWI
[all …]
/arch/blackfin/mach-bf609/
DKconfig1 config BF60x
12 config SEC_IRQ_PRIORITY_LEVELS
20 config L1_PARITY_CHECK
29 config SCB_PRIORITY
54 config SCB0_MI0_SLOT0
59 config SCB0_MI0_SLOT1
64 config SCB0_MI0_SLOT2
69 config SCB0_MI0_SLOT3
74 config SCB0_MI0_SLOT4
79 config SCB0_MI0_SLOT5
[all …]
/arch/blackfin/mach-bf533/
DKconfig10 config UART_ERROR
13 config SPORT0_ERROR
16 config SPI_ERROR
19 config SPORT1_ERROR
22 config PPI_ERROR
25 config DMA_ERROR
28 config PLLWAKE_ERROR
32 config RTC_ERROR
35 config DMA0_PPI
39 config DMA1_SPORT0RX
[all …]
/arch/um/
DKconfig.common1 config UML
13 config MMU
17 config NO_IOMEM
20 config ISA
23 config SBUS
26 config PCI
29 config PCMCIA
33 config TRACE_IRQFLAGS_SUPPORT
37 config LOCKDEP_SUPPORT
41 config STACKTRACE_SUPPORT
[all …]
/arch/arm/mach-omap1/
Dusb.c62 omap_otg_init(struct omap_usb_config *config) in omap_otg_init() argument
76 if (config->pins[0] > 2) /* alt pingroup 2 */ in omap_otg_init()
78 syscon |= config->usb0_init(config->pins[0], is_usb0_device(config)); in omap_otg_init()
79 syscon |= config->usb1_init(config->pins[1]); in omap_otg_init()
80 syscon |= config->usb2_init(config->pins[2], alt_pingroup); in omap_otg_init()
84 syscon = config->hmc_mode; in omap_otg_init()
87 if (config->otg) in omap_otg_init()
96 printk("USB: hmc %d", config->hmc_mode); in omap_otg_init()
98 printk(", usb2 alt %d wires", config->pins[2]); in omap_otg_init()
99 else if (config->pins[0]) in omap_otg_init()
[all …]
/arch/score/
DKconfig3 config SCORE
22 config ARCH_SCORE7
26 config MACH_SPCT6600
30 config SCORE_SIM
37 config NO_DMA
41 config RWSEM_GENERIC_SPINLOCK
44 config GENERIC_HWEIGHT
47 config GENERIC_CALIBRATE_DELAY
52 config 32BIT
55 config ARCH_FLATMEM_ENABLE
[all …]
/arch/mips/cavium-octeon/executive/
Dcvmx-pko.c52 union cvmx_pko_reg_cmd_buf config; in cvmx_pko_initialize_global() local
59 config.u64 = 0; in cvmx_pko_initialize_global()
60 config.s.pool = CVMX_FPA_OUTPUT_BUFFER_POOL; in cvmx_pko_initialize_global()
61 config.s.size = CVMX_FPA_OUTPUT_BUFFER_POOL_SIZE / 8 - 1; in cvmx_pko_initialize_global()
63 cvmx_write_csr(CVMX_PKO_REG_CMD_BUF, config.u64); in cvmx_pko_initialize_global()
161 union cvmx_pko_mem_queue_ptrs config; in cvmx_pko_shutdown() local
167 config.u64 = 0; in cvmx_pko_shutdown()
168 config.s.tail = 1; in cvmx_pko_shutdown()
169 config.s.index = 0; in cvmx_pko_shutdown()
170 config.s.port = CVMX_PKO_MEM_QUEUE_PTRS_ILLEGAL_PID; in cvmx_pko_shutdown()
[all …]
/arch/arm/common/
DKconfig1 config ICST
4 config SA1111
8 config DMABOUNCE
12 config SHARP_LOCOMO
15 config SHARP_PARAM
18 config SHARP_SCOOP
21 config TI_PRIV_EDMA
24 config FIQ_GLUE
/arch/arm/mach-pxa/
DKconfig7 config MACH_PXA3XX_DT
18 config ARCH_LUBBOCK
23 config MACH_MAINSTONE
27 config MACH_ZYLONITE
31 config MACH_ZYLONITE300
37 config MACH_ZYLONITE320
42 config MACH_LITTLETON
48 config MACH_TAVOREVB
56 config MACH_SAAR
66 config ARCH_PXA_IDP
[all …]
/arch/powerpc/platforms/cell/
Dcelleb_pci.c125 static void celleb_config_read_fake(unsigned char *config, int where, in celleb_config_read_fake() argument
128 char *p = config + where; in celleb_config_read_fake()
143 static void celleb_config_write_fake(unsigned char *config, int where, in celleb_config_write_fake() argument
146 char *p = config + where; in celleb_config_write_fake()
164 char *config; in celleb_fake_pci_read_config() local
173 config = get_fake_config_start(hose, devno, fn); in celleb_fake_pci_read_config()
176 if (!config) { in celleb_fake_pci_read_config()
181 celleb_config_read_fake(config, where, size, val); in celleb_fake_pci_read_config()
191 char *config; in celleb_fake_pci_write_config() local
200 config = get_fake_config_start(hose, devno, fn); in celleb_fake_pci_write_config()
[all …]
/arch/mips/mm/
Dc-tx39.c47 unsigned long flags, config; in tx39h_flush_icache_all() local
51 config = read_c0_conf(); in tx39h_flush_icache_all()
52 write_c0_conf(config & ~TX39_CONF_ICE); in tx39h_flush_icache_all()
55 write_c0_conf(config); in tx39h_flush_icache_all()
88 unsigned long flags, config; in tx39_blast_icache_page() local
91 config = read_c0_conf(); in tx39_blast_icache_page()
92 write_c0_conf(config & ~TX39_CONF_ICE); in tx39_blast_icache_page()
95 write_c0_conf(config); in tx39_blast_icache_page()
101 unsigned long flags, config; in tx39_blast_icache_page_indexed() local
104 config = read_c0_conf(); in tx39_blast_icache_page_indexed()
[all …]
/arch/unicore32/
DKconfig1 config UNICORE32
27 config GENERIC_CSUM
30 config NO_IOPORT_MAP
33 config STACKTRACE_SUPPORT
36 config HAVE_LATENCYTOP_SUPPORT
39 config LOCKDEP_SUPPORT
42 config RWSEM_GENERIC_SPINLOCK
45 config RWSEM_XCHGADD_ALGORITHM
48 config ARCH_HAS_ILOG2_U32
51 config ARCH_HAS_ILOG2_U64
[all …]
/arch/arm/boot/dts/
Dste-href-family-pinctrl.dtsi26 ste,config = <&in_pu>;
31 ste,config = <&out_hi>;
38 ste,config = <&slpm_in_wkup_pdis>;
43 ste,config = <&slpm_out_hi_wkup_pdis>;
48 ste,config = <&slpm_out_wkup_pdis>;
61 ste,config = <&in_pu>;
66 ste,config = <&out_hi>;
73 ste,config = <&slpm_in_wkup_pdis>;
78 ste,config = <&slpm_out_wkup_pdis>;
91 ste,config = <&in_pu>;
[all …]
/arch/avr32/
DKconfig1 config AVR32
29 config STACKTRACE_SUPPORT
32 config LOCKDEP_SUPPORT
35 config TRACE_IRQFLAGS_SUPPORT
38 config RWSEM_GENERIC_SPINLOCK
41 config RWSEM_XCHGADD_ALGORITHM
44 config ARCH_HAS_ILOG2_U32
47 config ARCH_HAS_ILOG2_U64
50 config GENERIC_HWEIGHT
53 config GENERIC_CALIBRATE_DELAY
[all …]
/arch/mips/txx9/
DKconfig1 config MACH_TX39XX
6 config MACH_TX49XX
15 config MACH_TXX9
25 config TOSHIBA_JMR3927
30 config TOSHIBA_RBTX4927
40 config TOSHIBA_RBTX4938
48 config TOSHIBA_RBTX4939
57 config SOC_TX3927
65 config SOC_TX4927
75 config SOC_TX4938
[all …]
/arch/mips/ralink/
DKconfig3 config CLKEVT_RT3352
10 config RALINK_ILL_ACC
21 config SOC_RT288X
25 config SOC_RT305X
29 config SOC_RT3883
33 config SOC_MT7620
44 config DTB_RT_NONE
47 config DTB_RT2880_EVAL
52 config DTB_RT305X_EVAL
57 config DTB_RT3883_EVAL
[all …]
/arch/mips/sibyte/
DKconfig1 config SIBYTE_SB1250
12 config SIBYTE_BCM1120
21 config SIBYTE_BCM1125
31 config SIBYTE_BCM1125H
42 config SIBYTE_BCM112X
50 config SIBYTE_BCM1x80
60 config SIBYTE_BCM1x55
70 config SIBYTE_SB1xxx_SOC
84 config CPU_SB1_PASS_1
89 config CPU_SB1_PASS_2_1250
[all …]

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