/arch/arm/mach-ixp4xx/ |
D | goramo_mlr.c | 338 static inline u8 __init flash_readb(u8 __iomem *flash, u32 addr) in flash_readb() argument 341 return __raw_readb(flash + addr); in flash_readb() 343 return __raw_readb(flash + (addr ^ 3)); in flash_readb() 347 static inline u16 __init flash_readw(u8 __iomem *flash, u32 addr) in flash_readw() argument 350 return __raw_readw(flash + addr); in flash_readw() 352 return __raw_readw(flash + (addr ^ 2)); in flash_readw() 358 u8 __iomem *flash; in gmlr_init() local 363 if ((flash = ioremap(IXP4XX_EXP_BUS_BASE_PHYS, 0x80)) == NULL) in gmlr_init() 367 system_rev = __raw_readl(flash + CFG_REV); in gmlr_init() 368 hw_bits = __raw_readl(flash + CFG_HW_BITS); in gmlr_init() [all …]
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/arch/cris/boot/rescue/ |
D | rescue_v10.lds | 3 flash : ORIGIN = 0x00000000, 14 } > flash 19 } > flash
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D | kimagerescue.S | 47 ;; 0x80000000 if loaded in flash (as it should be) 48 ;; since etrax actually starts at address 2 when booting from flash, we 54 ;; (so we can flash LEDs, and so that DTR and others are set) 88 moveq 0, $r1 ; "timer" to clock out a LED red flash
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/arch/xtensa/boot/dts/ |
D | xtfpga-flash-4m.dtsi | 3 flash: flash@08000000 { label 6 compatible = "cfi-flash";
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D | xtfpga-flash-128m.dtsi | 3 flash: flash@00000000 { label 6 compatible = "cfi-flash";
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D | xtfpga-flash-16m.dtsi | 3 flash: flash@08000000 { label 6 compatible = "cfi-flash";
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/arch/powerpc/boot/dts/ |
D | media5200.dts | 114 flash@0,0 { 115 compatible = "amd,am29lv28ml", "cfi-flash"; 117 bank-width = <4>; // Width in bytes of the flash bank 121 flash@1,0 { 122 compatible = "amd,am29lv28ml", "cfi-flash"; 124 bank-width = <4>; // Width in bytes of the flash bank
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D | sbc8548-altflash.dts | 4 * Configured for booting off the alternate (64MB SODIMM) flash. 36 flash@0,0 { 40 compatible = "intel,JS28F128", "cfi-flash"; 91 alt-flash@6,0 { 94 compatible = "intel,JS28F640", "cfi-flash";
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D | sbc8548.dts | 34 flash@0,0 { 37 compatible = "intel,JS28F640", "cfi-flash"; 88 alt-flash@6,0 { 92 compatible = "intel,JS28F128", "cfi-flash";
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D | cm5200.dts | 79 // 16-bit flash device at LocalPlus Bus CS0 80 flash@0,0 { 81 compatible = "cfi-flash";
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D | o2dnt2.dts | 27 flash@0,0 { 28 compatible = "cfi-flash";
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D | o2d.dts | 27 flash@0,0 { 28 compatible = "cfi-flash";
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D | o3dnt.dts | 27 flash@0,0 { 28 compatible = "cfi-flash";
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D | o2d.dtsi | 84 // flash device at LocalPlus Bus CS0 85 flash@0,0 { 86 compatible = "cfi-flash";
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D | o2d300.dts | 22 flash@0,0 { 23 compatible = "cfi-flash";
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/arch/cris/boot/compressed/ |
D | head_v10.S | 58 ;; in the flash (since we wont try to copy it to DRAM 59 ;; before unpacking). It is at _edata, but in flash. 65 move.d $r5, $r0 ; save for later - flash address of 'basse' 67 sub.d basse, $r5 ; $r5 = flash address of '_edata' 103 ;; when mounting from flash 105 move.d [input_data], $r9 ; flash address of compressed kernel
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/arch/arm/boot/dts/ |
D | orion5x-lacie-ethernet-disk-mini-v2.dts | 11 * TODO: add flash write support: see below. 85 * accidentally erasing critical flash sectors. We thus define 87 * flash. TODO: once the flash part TOP/BOTTOM detection 92 flash@0 { 93 compatible = "cfi-flash";
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D | orion5x-maxtor-shared-storage-2.dts | 64 * accidentally erasing critical flash sectors. We thus define 66 * flash. TODO: once the flash part TOP/BOTTOM detection 71 flash@0 { 72 compatible = "cfi-flash";
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D | orion5x-rd88f5182-nas.dts | 62 flash@0 { 63 compatible = "cfi-flash"; 84 flash@0 { 85 compatible = "cfi-flash";
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/arch/avr32/boards/hammerhead/ |
D | Makefile | 1 obj-y += setup.o flash.o
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/arch/avr32/boards/mimc200/ |
D | Makefile | 1 obj-y += setup.o flash.o
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/arch/avr32/boards/favr-32/ |
D | Makefile | 1 obj-y += setup.o flash.o
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/arch/avr32/boards/merisc/ |
D | Makefile | 1 obj-y += setup.o flash.o display.o merisc_sysfs.o
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/arch/mn10300/unit-asb2303/ |
D | Makefile | 6 obj-y := unit-init.o smc91111.o flash.o leds.o
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/arch/c6x/boot/dts/ |
D | dsk6455.dts | 39 flash@3,0 { 42 compatible = "cfi-flash";
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