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Searched refs:gc (Results 1 – 21 of 21) sorted by relevance

/arch/powerpc/sysdev/
Dsimple_gpio.c45 static int u8_gpio_get(struct gpio_chip *gc, unsigned int gpio) in u8_gpio_get() argument
47 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); in u8_gpio_get()
52 static void u8_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val) in u8_gpio_set() argument
54 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); in u8_gpio_set()
70 static int u8_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio) in u8_gpio_dir_in() argument
75 static int u8_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) in u8_gpio_dir_out() argument
77 u8_gpio_set(gc, gpio, val); in u8_gpio_dir_out()
93 struct gpio_chip *gc; in u8_simple_gpiochip_add() local
102 gc = &mm_gc->gc; in u8_simple_gpiochip_add()
105 gc->ngpio = 8; in u8_simple_gpiochip_add()
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Dppc4xx_gpio.c76 static int ppc4xx_gpio_get(struct gpio_chip *gc, unsigned int gpio) in ppc4xx_gpio_get() argument
78 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); in ppc4xx_gpio_get()
85 __ppc4xx_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val) in __ppc4xx_gpio_set() argument
87 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); in __ppc4xx_gpio_set()
97 ppc4xx_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val) in ppc4xx_gpio_set() argument
99 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); in ppc4xx_gpio_set()
105 __ppc4xx_gpio_set(gc, gpio, val); in ppc4xx_gpio_set()
112 static int ppc4xx_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio) in ppc4xx_gpio_dir_in() argument
114 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); in ppc4xx_gpio_dir_in()
142 ppc4xx_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) in ppc4xx_gpio_dir_out() argument
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Dcpm_common.c252 static int cpm2_gpio32_get(struct gpio_chip *gc, unsigned int gpio) in cpm2_gpio32_get() argument
254 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); in cpm2_gpio32_get()
277 static void cpm2_gpio32_set(struct gpio_chip *gc, unsigned int gpio, int value) in cpm2_gpio32_set() argument
279 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); in cpm2_gpio32_set()
291 static int cpm2_gpio32_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) in cpm2_gpio32_dir_out() argument
293 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); in cpm2_gpio32_dir_out()
309 static int cpm2_gpio32_dir_in(struct gpio_chip *gc, unsigned int gpio) in cpm2_gpio32_dir_in() argument
311 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); in cpm2_gpio32_dir_in()
330 struct gpio_chip *gc; in cpm2_gpiochip_add32() local
339 gc = &mm_gc->gc; in cpm2_gpiochip_add32()
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Dcpm1.c546 static int cpm1_gpio16_get(struct gpio_chip *gc, unsigned int gpio) in cpm1_gpio16_get() argument
548 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); in cpm1_gpio16_get()
571 static void cpm1_gpio16_set(struct gpio_chip *gc, unsigned int gpio, int value) in cpm1_gpio16_set() argument
573 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); in cpm1_gpio16_set()
585 static int cpm1_gpio16_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) in cpm1_gpio16_dir_out() argument
587 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); in cpm1_gpio16_dir_out()
603 static int cpm1_gpio16_dir_in(struct gpio_chip *gc, unsigned int gpio) in cpm1_gpio16_dir_in() argument
605 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); in cpm1_gpio16_dir_in()
624 struct gpio_chip *gc; in cpm1_gpiochip_add16() local
633 gc = &mm_gc->gc; in cpm1_gpiochip_add16()
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/arch/mips/jz4740/
Dirq.c54 static void jz4740_irq_set_mask(struct irq_chip_generic *gc, uint32_t mask) in jz4740_irq_set_mask() argument
56 struct irq_chip_regs *regs = &gc->chip_types->regs; in jz4740_irq_set_mask()
58 writel(mask, gc->reg_base + regs->enable); in jz4740_irq_set_mask()
59 writel(~mask, gc->reg_base + regs->disable); in jz4740_irq_set_mask()
64 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(data); in jz4740_irq_suspend() local
65 jz4740_irq_set_mask(gc, gc->wake_active); in jz4740_irq_suspend()
70 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(data); in jz4740_irq_resume() local
71 jz4740_irq_set_mask(gc, gc->mask_cache); in jz4740_irq_resume()
81 struct irq_chip_generic *gc; in arch_init_irq() local
91 gc = irq_alloc_generic_chip("INTC", 1, JZ4740_IRQ_BASE, jz_intc_base, in arch_init_irq()
[all …]
Dgpio.c102 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(data); in irq_to_jz_gpio_chip() local
103 return gc->private; in irq_to_jz_gpio_chip()
422 struct irq_chip_generic *gc; in jz4740_gpio_chip_init() local
431 gc = irq_alloc_generic_chip(chip->gpio_chip.label, 1, chip->irq_base, in jz4740_gpio_chip_init()
434 gc->wake_enabled = IRQ_MSK(chip->gpio_chip.ngpio); in jz4740_gpio_chip_init()
435 gc->private = chip; in jz4740_gpio_chip_init()
437 ct = gc->chip_types; in jz4740_gpio_chip_init()
454 irq_setup_generic_chip(gc, IRQ_MSK(chip->gpio_chip.ngpio), in jz4740_gpio_chip_init()
/arch/powerpc/platforms/83xx/
Dmcu_mpc8349emitx.c41 struct gpio_chip gc; member
100 static void mcu_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val) in mcu_gpio_set() argument
102 struct mcu *mcu = container_of(gc, struct mcu, gc); in mcu_gpio_set()
115 static int mcu_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) in mcu_gpio_dir_out() argument
117 mcu_gpio_set(gc, gpio, val); in mcu_gpio_dir_out()
124 struct gpio_chip *gc = &mcu->gc; in mcu_gpiochip_add() local
130 gc->owner = THIS_MODULE; in mcu_gpiochip_add()
131 gc->label = np->full_name; in mcu_gpiochip_add()
132 gc->can_sleep = 1; in mcu_gpiochip_add()
133 gc->ngpio = MCU_NUM_GPIO; in mcu_gpiochip_add()
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/arch/powerpc/sysdev/qe_lib/
Dgpio.c60 static int qe_gpio_get(struct gpio_chip *gc, unsigned int gpio) in qe_gpio_get() argument
62 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); in qe_gpio_get()
69 static void qe_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val) in qe_gpio_set() argument
71 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); in qe_gpio_set()
89 static int qe_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio) in qe_gpio_dir_in() argument
91 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); in qe_gpio_dir_in()
104 static int qe_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) in qe_gpio_dir_out() argument
106 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); in qe_gpio_dir_out()
110 qe_gpio_set(gc, gpio, val); in qe_gpio_dir_out()
142 struct gpio_chip *gc; in qe_pin_request() local
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/arch/arm/mach-imx/
Dirq-common.c27 struct irq_chip_generic *gc; in mxc_set_irq_fiq() local
33 gc = irq_get_chip_data(irq); in mxc_set_irq_fiq()
34 if (gc && gc->private) { in mxc_set_irq_fiq()
35 exirq = gc->private; in mxc_set_irq_fiq()
Davic.c93 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); in avic_irq_suspend() local
94 struct irq_chip_type *ct = gc->chip_types; in avic_irq_suspend()
98 __raw_writel(gc->wake_active, avic_base + ct->regs.mask); in avic_irq_suspend()
103 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); in avic_irq_resume() local
104 struct irq_chip_type *ct = gc->chip_types; in avic_irq_resume()
117 struct irq_chip_generic *gc; in avic_init_gc() local
120 gc = irq_alloc_generic_chip("mxc-avic", 1, irq_start, avic_base, in avic_init_gc()
122 gc->private = &avic_extra_irq; in avic_init_gc()
123 gc->wake_enabled = IRQ_MSK(32); in avic_init_gc()
125 ct = gc->chip_types; in avic_init_gc()
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Dtzic.c82 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); in tzic_irq_suspend() local
85 __raw_writel(gc->wake_active, tzic_base + TZIC_WAKEUP0(idx)); in tzic_irq_suspend()
109 struct irq_chip_generic *gc; in tzic_init_gc() local
112 gc = irq_alloc_generic_chip("tzic", 1, irq_start, tzic_base, in tzic_init_gc()
114 gc->private = &tzic_extra_irq; in tzic_init_gc()
115 gc->wake_enabled = IRQ_MSK(32); in tzic_init_gc()
117 ct = gc->chip_types; in tzic_init_gc()
126 irq_setup_generic_chip(gc, IRQ_MSK(32), 0, IRQ_NOREQUEST, 0); in tzic_init_gc()
/arch/arm/plat-orion/
Dirq.c25 struct irq_chip_generic *gc; in orion_irq_init() local
33 gc = irq_alloc_generic_chip("orion_irq", 1, irq_start, maskaddr, in orion_irq_init()
35 ct = gc->chip_types; in orion_irq_init()
38 irq_setup_generic_chip(gc, IRQ_MSK(32), IRQ_GC_INIT_MASK_CACHE, in orion_irq_init()
Dgpio.c358 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); in gpio_irq_set_type() local
360 struct orion_gpio_chip *ochip = gc->private; in gpio_irq_set_type()
502 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); in orion_gpio_unmask_irq() local
507 irq_gc_lock(gc); in orion_gpio_unmask_irq()
508 reg_val = irq_reg_readl(gc, ct->regs.mask); in orion_gpio_unmask_irq()
510 irq_reg_writel(gc, reg_val, ct->regs.mask); in orion_gpio_unmask_irq()
511 irq_gc_unlock(gc); in orion_gpio_unmask_irq()
516 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); in orion_gpio_mask_irq() local
521 irq_gc_lock(gc); in orion_gpio_mask_irq()
522 reg_val = irq_reg_readl(gc, ct->regs.mask); in orion_gpio_mask_irq()
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/arch/sh/boards/mach-se/7722/
Dirq.c74 struct irq_chip_generic *gc; in se7722_gc_init() local
80 gc = irq_alloc_generic_chip(DRV_NAME, 1, irq_base, se7722_irq_regs, in se7722_gc_init()
82 if (unlikely(!gc)) in se7722_gc_init()
85 ct = gc->chip_types; in se7722_gc_init()
91 irq_setup_generic_chip(gc, IRQ_MSK(SE7722_FPGA_IRQ_NR), in se7722_gc_init()
/arch/arm/mach-davinci/
Dirq.c51 struct irq_chip_generic *gc; in davinci_alloc_gc() local
54 gc = irq_alloc_generic_chip("AINTC", 1, irq_start, base, handle_edge_irq); in davinci_alloc_gc()
55 if (!gc) { in davinci_alloc_gc()
61 ct = gc->chip_types; in davinci_alloc_gc()
68 irq_setup_generic_chip(gc, IRQ_MSK(num), IRQ_GC_INIT_MASK_CACHE, in davinci_alloc_gc()
/arch/powerpc/platforms/52xx/
Dmpc52xx_gpt.c99 struct gpio_chip gc; member
281 static inline struct mpc52xx_gpt_priv *gc_to_mpc52xx_gpt(struct gpio_chip *gc) in gc_to_mpc52xx_gpt() argument
283 return container_of(gc, struct mpc52xx_gpt_priv, gc); in gc_to_mpc52xx_gpt()
286 static int mpc52xx_gpt_gpio_get(struct gpio_chip *gc, unsigned int gpio) in mpc52xx_gpt_gpio_get() argument
288 struct mpc52xx_gpt_priv *gpt = gc_to_mpc52xx_gpt(gc); in mpc52xx_gpt_gpio_get()
294 mpc52xx_gpt_gpio_set(struct gpio_chip *gc, unsigned int gpio, int v) in mpc52xx_gpt_gpio_set() argument
296 struct mpc52xx_gpt_priv *gpt = gc_to_mpc52xx_gpt(gc); in mpc52xx_gpt_gpio_set()
308 static int mpc52xx_gpt_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio) in mpc52xx_gpt_gpio_dir_in() argument
310 struct mpc52xx_gpt_priv *gpt = gc_to_mpc52xx_gpt(gc); in mpc52xx_gpt_gpio_dir_in()
323 mpc52xx_gpt_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) in mpc52xx_gpt_gpio_dir_out() argument
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/arch/sh/boards/mach-se/7343/
Dirq.c75 struct irq_chip_generic *gc; in se7343_gc_init() local
81 gc = irq_alloc_generic_chip(DRV_NAME, 1, irq_base, se7343_irq_regs, in se7343_gc_init()
83 if (unlikely(!gc)) in se7343_gc_init()
86 ct = gc->chip_types; in se7343_gc_init()
92 irq_setup_generic_chip(gc, IRQ_MSK(SE7343_FPGA_IRQ_NR), in se7343_gc_init()
/arch/mips/goldfish/
Dgoldfish-interrupt.c70 struct irq_chip_generic *gc; in goldfish_pic_of_init() local
98 gc = irq_alloc_generic_chip("GFPIC", 1, GFPIC_IRQ_BASE, gfpic->base, in goldfish_pic_of_init()
100 if (!gc) { in goldfish_pic_of_init()
106 ct = gc->chip_types; in goldfish_pic_of_init()
112 irq_setup_generic_chip(gc, IRQ_MSK(GFPIC_NR_IRQS), 0, in goldfish_pic_of_init()
/arch/arm/mach-omap2/
Dprm_common.c260 struct irq_chip_generic *gc; in omap_prcm_register_chain_handler() local
313 gc = irq_alloc_generic_chip("PRCM", 1, in omap_prcm_register_chain_handler()
317 if (!gc) { in omap_prcm_register_chain_handler()
321 ct = gc->chip_types; in omap_prcm_register_chain_handler()
329 irq_setup_generic_chip(gc, mask[i], 0, IRQ_NOREQUEST, 0); in omap_prcm_register_chain_handler()
330 prcm_irq_chips[i] = gc; in omap_prcm_register_chain_handler()
/arch/powerpc/platforms/embedded6xx/
DKconfig110 More information at: <http://gc-linux.sourceforge.net/>
118 More information at: <http://gc-linux.sourceforge.net/>
/arch/mips/include/asm/octeon/
Dcvmx-pciercx-defs.h2117 uint32_t gc:1; member
2121 uint32_t gc:1;