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Searched refs:gpc_base (Results 1 – 3 of 3) sorted by relevance

/arch/arm/mach-imx/
Dgpc.c26 static void __iomem *gpc_base; variable
32 void __iomem *reg_imr1 = gpc_base + GPC_IMR1; in imx_gpc_pre_suspend()
37 writel_relaxed(0x1, gpc_base + GPC_PGC_CPU_PDN); in imx_gpc_pre_suspend()
47 void __iomem *reg_imr1 = gpc_base + GPC_IMR1; in imx_gpc_post_resume()
51 writel_relaxed(0x0, gpc_base + GPC_PGC_CPU_PDN); in imx_gpc_post_resume()
75 void __iomem *reg_imr1 = gpc_base + GPC_IMR1; in imx_gpc_mask_all()
87 void __iomem *reg_imr1 = gpc_base + GPC_IMR1; in imx_gpc_restore_all()
103 reg = gpc_base + GPC_IMR1 + (d->irq / 32 - 1) * 4; in imx_gpc_irq_unmask()
118 reg = gpc_base + GPC_IMR1 + (d->irq / 32 - 1) * 4; in imx_gpc_irq_mask()
130 gpc_base = of_iomap(np, 0); in imx_gpc_init()
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Dpm-imx5.c69 static void __iomem *gpc_base; variable
91 arm_srpgcr = __raw_readl(gpc_base + MXC_SRPG_ARM_SRPGCR) & in mx5_cpu_lp_set()
93 empgc0 = __raw_readl(gpc_base + MXC_SRPG_EMPGC0_SRPGCR) & in mx5_cpu_lp_set()
95 empgc1 = __raw_readl(gpc_base + MXC_SRPG_EMPGC1_SRPGCR) & in mx5_cpu_lp_set()
132 __raw_writel(arm_srpgcr, gpc_base + MXC_SRPG_ARM_SRPGCR); in mx5_cpu_lp_set()
133 __raw_writel(arm_srpgcr, gpc_base + MXC_SRPG_NEON_SRPGCR); in mx5_cpu_lp_set()
139 __raw_writel(empgc0, gpc_base + MXC_SRPG_EMPGC0_SRPGCR); in mx5_cpu_lp_set()
140 __raw_writel(empgc1, gpc_base + MXC_SRPG_EMPGC1_SRPGCR); in mx5_cpu_lp_set()
162 __raw_writel(0, gpc_base + MXC_SRPG_EMPGC0_SRPGCR); in mx5_suspend_enter()
163 __raw_writel(0, gpc_base + MXC_SRPG_EMPGC1_SRPGCR); in mx5_suspend_enter()
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Dpm-imx6.c196 struct imx6_pm_base gpc_base; member
512 ret = imx6_pm_get_base(&pm_info->gpc_base, socdata->gpc_compat); in imx6q_suspend_init()
545 iounmap(&pm_info->gpc_base.vbase); in imx6q_suspend_init()