Home
last modified time | relevance | path

Searched refs:imx_clk_fixup_mux (Results 1 – 4 of 4) sorted by relevance

/arch/arm/mach-imx/
Dclk-imx6sl.c305 …clks[IMX6SL_CLK_USDHC1_SEL] = imx_clk_fixup_mux("usdhc1_sel", base + 0x1c, 16, 1, usdhc_sels… in imx6sl_clocks_init()
306 …clks[IMX6SL_CLK_USDHC2_SEL] = imx_clk_fixup_mux("usdhc2_sel", base + 0x1c, 17, 1, usdhc_sels… in imx6sl_clocks_init()
307 …clks[IMX6SL_CLK_USDHC3_SEL] = imx_clk_fixup_mux("usdhc3_sel", base + 0x1c, 18, 1, usdhc_sels… in imx6sl_clocks_init()
308 …clks[IMX6SL_CLK_USDHC4_SEL] = imx_clk_fixup_mux("usdhc4_sel", base + 0x1c, 19, 1, usdhc_sels… in imx6sl_clocks_init()
309 …clks[IMX6SL_CLK_SSI1_SEL] = imx_clk_fixup_mux("ssi1_sel", base + 0x1c, 10, 2, ssi_sels, … in imx6sl_clocks_init()
310 …clks[IMX6SL_CLK_SSI2_SEL] = imx_clk_fixup_mux("ssi2_sel", base + 0x1c, 12, 2, ssi_sels, … in imx6sl_clocks_init()
311 …clks[IMX6SL_CLK_SSI3_SEL] = imx_clk_fixup_mux("ssi3_sel", base + 0x1c, 14, 2, ssi_sels, … in imx6sl_clocks_init()
312 …clks[IMX6SL_CLK_PERCLK_SEL] = imx_clk_fixup_mux("perclk_sel", base + 0x1c, 6, 1, perclk_sel… in imx6sl_clocks_init()
Dclk-imx6q.c297 …clk[IMX6QDL_CLK_SSI1_SEL] = imx_clk_fixup_mux("ssi1_sel", base + 0x1c, 10, 2, ssi_sels, … in imx6q_clocks_init()
298 …clk[IMX6QDL_CLK_SSI2_SEL] = imx_clk_fixup_mux("ssi2_sel", base + 0x1c, 12, 2, ssi_sels, … in imx6q_clocks_init()
299 …clk[IMX6QDL_CLK_SSI3_SEL] = imx_clk_fixup_mux("ssi3_sel", base + 0x1c, 14, 2, ssi_sels, … in imx6q_clocks_init()
300 …clk[IMX6QDL_CLK_USDHC1_SEL] = imx_clk_fixup_mux("usdhc1_sel", base + 0x1c, 16, 1, usdhc_sels… in imx6q_clocks_init()
301 …clk[IMX6QDL_CLK_USDHC2_SEL] = imx_clk_fixup_mux("usdhc2_sel", base + 0x1c, 17, 1, usdhc_sels… in imx6q_clocks_init()
302 …clk[IMX6QDL_CLK_USDHC3_SEL] = imx_clk_fixup_mux("usdhc3_sel", base + 0x1c, 18, 1, usdhc_sels… in imx6q_clocks_init()
303 …clk[IMX6QDL_CLK_USDHC4_SEL] = imx_clk_fixup_mux("usdhc4_sel", base + 0x1c, 19, 1, usdhc_sels… in imx6q_clocks_init()
305 …clk[IMX6QDL_CLK_EIM_SEL] = imx_clk_fixup_mux("eim_sel", base + 0x1c, 27, 2, eim_sels… in imx6q_clocks_init()
306 …clk[IMX6QDL_CLK_EIM_SLOW_SEL] = imx_clk_fixup_mux("eim_slow_sel", base + 0x1c, 29, 2, eim_slow… in imx6q_clocks_init()
Dclk-fixup-mux.c74 struct clk *imx_clk_fixup_mux(const char *name, void __iomem *reg, in imx_clk_fixup_mux() function
Dclk.h72 struct clk *imx_clk_fixup_mux(const char *name, void __iomem *reg,