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/arch/m68k/coldfire/
DMakefile18 obj-$(CONFIG_M5206) += m5206.o timers.o intc.o reset.o
19 obj-$(CONFIG_M5206e) += m5206.o timers.o intc.o reset.o
20 obj-$(CONFIG_M520x) += m520x.o pit.o intc-simr.o reset.o
21 obj-$(CONFIG_M523x) += m523x.o pit.o dma_timer.o intc-2.o reset.o
22 obj-$(CONFIG_M5249) += m5249.o timers.o intc.o intc-5249.o reset.o
23 obj-$(CONFIG_M525x) += m525x.o timers.o intc.o intc-525x.o reset.o
24 obj-$(CONFIG_M527x) += m527x.o pit.o intc-2.o reset.o
25 obj-$(CONFIG_M5272) += m5272.o intc-5272.o timers.o
26 obj-$(CONFIG_M528x) += m528x.o pit.o intc-2.o reset.o
27 obj-$(CONFIG_M5307) += m5307.o timers.o intc.o reset.o
[all …]
/arch/arm/boot/dts/
Dmmp2.dtsi26 interrupt-parent = <&intc>;
41 intc: interrupt-controller@d4282000 { label
42 compatible = "mrvl,mmp2-intc";
46 mrvl,intc-nr-irqs = <64>;
50 compatible = "mrvl,mmp2-mux-intc";
56 mrvl,intc-nr-irqs = <2>;
60 compatible = "mrvl,mmp2-mux-intc";
66 mrvl,intc-nr-irqs = <2>;
71 compatible = "mrvl,mmp2-mux-intc";
77 mrvl,intc-nr-irqs = <3>;
[all …]
Dzynq-7000.dtsi47 interrupt-parent = <&intc>;
64 interrupt-parent = <&intc>;
71 interrupt-parent = <&intc>;
82 interrupt-parent = <&intc>;
94 interrupt-parent = <&intc>;
104 interrupt-parent = <&intc>;
113 interrupt-parent = <&intc>;
124 interrupt-parent = <&intc>;
131 intc: interrupt-controller@f8f01000 { label
175 interrupt-parent = <&intc>;
[all …]
Dsh73a0.dtsi62 compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin";
81 compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin";
101 compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin";
120 compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin";
Dpxa168.dtsi25 interrupt-parent = <&intc>;
35 intc: interrupt-controller@d4282000 { label
36 compatible = "mrvl,mmp-intc";
40 mrvl,intc-nr-irqs = <64>;
Dpxa910.dtsi25 interrupt-parent = <&intc>;
40 intc: interrupt-controller@d4282000 { label
41 compatible = "mrvl,mmp-intc";
45 mrvl,intc-nr-irqs = <64>;
Dpxa3xx.dtsi28 marvell,intc-priority;
29 marvell,intc-nr-irqs = <56>;
Dstih41x.dtsi27 intc: interrupt-controller@fffe1000 { label
41 interrupt-parent = <&intc>;
Dpxa27x.dtsi11 marvell,intc-priority;
12 marvell,intc-nr-irqs = <34>;
Dnspire-classic.dtsi64 intc: interrupt-controller@DC000000 { label
65 compatible = "lsi,zevio-intc";
Dvt8500.dtsi36 interrupt-parent = <&intc>;
38 intc: interrupt-controller@d8140000 { label
39 compatible = "via,vt8500-intc";
Ds3c24xx.dtsi15 interrupt-parent = <&intc>;
24 intc:interrupt-controller@4a000000 { label
Dr8a7740.dtsi58 compatible = "renesas,intc-irqpin-r8a7740", "renesas,intc-irqpin";
78 compatible = "renesas,intc-irqpin-r8a7740", "renesas,intc-irqpin";
98 compatible = "renesas,intc-irqpin-r8a7740", "renesas,intc-irqpin";
118 compatible = "renesas,intc-irqpin-r8a7740", "renesas,intc-irqpin";
/arch/mips/boot/dts/
Drt3050.dtsi32 intc: intc@200 { label
33 compatible = "ralink,rt3052-intc", "ralink,rt2880-intc";
52 interrupt-parent = <&intc>;
63 interrupt-parent = <&intc>;
Dmt7620a.dtsi32 intc: intc@200 { label
33 compatible = "ralink,mt7620a-intc", "ralink,rt2880-intc";
52 interrupt-parent = <&intc>;
Drt3883.dtsi32 intc: intc@200 { label
33 compatible = "ralink,rt3883-intc", "ralink,rt2880-intc";
52 interrupt-parent = <&intc>;
Drt2880.dtsi32 intc: intc@200 { label
33 compatible = "ralink,rt2880-intc";
52 interrupt-parent = <&intc>;
/arch/microblaze/kernel/
Dintc.c139 static int __init xilinx_intc_of_init(struct device_node *intc, in xilinx_intc_of_init() argument
145 intc_baseaddr = of_iomap(intc, 0); in xilinx_intc_of_init()
148 ret = of_property_read_u32(intc, "xlnx,num-intr-inputs", &nr_irq); in xilinx_intc_of_init()
154 ret = of_property_read_u32(intc, "xlnx,kind-of-intr", &intr_mask); in xilinx_intc_of_init()
164 intc->full_name, nr_irq, intr_mask); in xilinx_intc_of_init()
189 root_domain = irq_domain_add_linear(intc, nr_irq, &xintc_irq_domain_ops, in xilinx_intc_of_init()
/arch/metag/boot/dts/
Dtz1090.dtsi16 interrupt-parent = <&intc>;
18 intc: interrupt-controller { label
19 compatible = "img,meta-intc";
36 compatible = "img,pdc-intc";
/arch/arc/boot/dts/
Dangel4.dts17 interrupt-parent = <&intc>;
35 intc: interrupt-controller { label
36 compatible = "snps,arc700-intc";
Dnsimosci.dts17 interrupt-parent = <&intc>;
38 intc: interrupt-controller { label
39 compatible = "snps,arc700-intc";
/arch/sh/kernel/cpu/irq/
DMakefile5 obj-$(CONFIG_CPU_SH5) += intc-sh5.o
/arch/arm/mach-shmobile/
DMakefile9 obj-$(CONFIG_ARCH_SH7372) += setup-sh7372.o intc-sh7372.o pm-sh7372.o
10 obj-$(CONFIG_ARCH_SH73A0) += setup-sh73a0.o intc-sh73a0.o pm-sh73a0.o
56 obj-$(CONFIG_ARCH_SH7372) += entry-intc.o sleep-sh7372.o
/arch/mips/include/asm/
Dtxx9pio.h21 __u32 intc; member
/arch/avr32/mach-at32ap/
DMakefile1 obj-y += pdc.o clock.o intc.o extint.o pio.o hsmc.o

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