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Searched refs:mfctl (Results 1 – 20 of 20) sorted by relevance

/arch/parisc/kernel/
Dbinfmt_elf32.c25 dst[48] = (elf_greg_t) mfctl(22); dst[49] = (elf_greg_t) mfctl(0); \
26 dst[50] = (elf_greg_t) mfctl(24); dst[51] = (elf_greg_t) mfctl(25); \
27 dst[52] = (elf_greg_t) mfctl(26); dst[53] = (elf_greg_t) mfctl(27); \
28 dst[54] = (elf_greg_t) mfctl(28); dst[55] = (elf_greg_t) mfctl(29); \
29 dst[56] = (elf_greg_t) mfctl(30); dst[57] = (elf_greg_t) mfctl(31); \
30 dst[58] = (elf_greg_t) mfctl( 8); dst[59] = (elf_greg_t) mfctl( 9); \
31 dst[60] = (elf_greg_t) mfctl(12); dst[61] = (elf_greg_t) mfctl(13); \
32 dst[62] = (elf_greg_t) mfctl(10); dst[63] = (elf_greg_t) mfctl(15);
Dtime.c76 now = mfctl(16); in timer_interrupt()
121 now2 = mfctl(16); in timer_interrupt()
227 unsigned long next_tick = mfctl(16) + clocktick; in start_cpu_itimer()
Dentry.S119 mfctl %cr30, %r1
202 mfctl %pcsq, spc
204 mfctl %pcoq, va
215 mfctl %pcsq, spc
221 mfctl %pcoq, va
233 mfctl %isr,spc
235 mfctl %ior,va
247 mfctl %isr,spc
253 mfctl %ior,va
265 mfctl %isr, spc
[all …]
Dcache.c352 alltime = mfctl(16); in parisc_setup_cache_timing()
354 alltime = mfctl(16) - alltime; in parisc_setup_cache_timing()
357 rangetime = mfctl(16); in parisc_setup_cache_timing()
359 rangetime = mfctl(16) - rangetime; in parisc_setup_cache_timing()
Dsyscall.S142 mfctl %cr30,%r1
158 mfctl %cr30,%r1 /* get task ptr in %r1 */
197 mfctl %cr11, %r27 /* i.e. SAR */
213 mfctl %cr30, %r1
584 mfctl %cr27, %r21 /* Get current thread register */
626 mfctl %cr27, %r1
Dtraps.c137 cr30 = mfctl(30); in show_regs()
138 cr31 = mfctl(31); in show_regs()
602 regs->gr[regs->iir & 0x1f] = mfctl(27); in handle_interruption()
604 regs->gr[regs->iir & 0x1f] = mfctl(26); in handle_interruption()
Dhead.S196 mfctl %cr30,%r6 /* PCX-W2 firmware bug */
240 mfctl,w %cr11,%r10
Dhpmc.S116 mfctl %cr14, %r4
Dreal2.S125 # define PUSH_CR(r, where) mfctl r, %r1 ! STREG,ma %r1, REG_SZ(where)
Dperf_asm.S54 mfctl ccr,%r26 ; get coprocessor register
80 mfctl ccr,%r26 ; get coprocessor register
Dirq.c519 eirr_val = mfctl(23) & cpu_eiem & per_cpu(local_ack_eiem, cpu); in do_cpu_irq_mask()
/arch/parisc/include/asm/
Delf.h285 dst[48] = mfctl(22); dst[49] = mfctl(0); \
286 dst[50] = mfctl(24); dst[51] = mfctl(25); \
287 dst[52] = mfctl(26); dst[53] = mfctl(27); \
288 dst[54] = mfctl(28); dst[55] = mfctl(29); \
289 dst[56] = mfctl(30); dst[57] = mfctl(31); \
290 dst[58] = mfctl( 8); dst[59] = mfctl( 9); \
291 dst[60] = mfctl(12); dst[61] = mfctl(13); \
292 dst[62] = mfctl(10); dst[63] = mfctl(15);
Dspecial_insns.h4 #define mfctl(reg) ({ \ macro
20 #define get_eiem() mfctl(15)
Dtimex.h16 return mfctl(16); in get_cycles()
Dthread_info.h33 #define current_thread_info() ((struct thread_info *)mfctl(30))
Dassembly.h177 #define SAVE_CR(r, where) mfctl r, %r1 ! STREG %r1, where
347 mfctl %cr27, %r3
391 mfctl %cr27, %r3
456 mfctl,w %cr11, %r1
467 mfctl %cr22, %r8
/arch/parisc/lib/
Ddelay.c38 bclock = mfctl(16); in __cr16_delay()
40 now = mfctl(16); in __cr16_delay()
62 bclock = mfctl(16); in __cr16_delay()
Dfixup.S33 mfctl 30,\t2
Dlusercopy.S49 mfctl %cr30,%r1
/arch/parisc/hpux/
Dgate.S41 mfctl %cr30,%r1
81 mfctl %cr11, %r27 /* i.e. SAR */