| /arch/arm/mach-omap2/ |
| D | clkt2xxx_dpllcore.c | 115 u32 cur_rate, low, mult, div, valid_rate, done_rate; in omap2_reprogram_dpllcore() local
121 mult = omap2xxx_cm_get_core_clk_src(); in omap2_reprogram_dpllcore()
123 if ((rate == (cur_rate / 2)) && (mult == 2)) { in omap2_reprogram_dpllcore()
125 } else if ((rate == (cur_rate * 2)) && (mult == 1)) { in omap2_reprogram_dpllcore()
132 if (mult == 1) in omap2_reprogram_dpllcore()
149 mult = ((rate / 2) / 1000000); in omap2_reprogram_dpllcore()
153 mult = (rate / 1000000); in omap2_reprogram_dpllcore()
157 tmpset.cm_clksel1_pll |= (mult << __ffs(dd->div1_mask)); in omap2_reprogram_dpllcore()
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| /arch/mn10300/include/asm/ |
| D | div64.h | 79 unsigned __muldiv64u(unsigned val, unsigned mult, unsigned div) in __muldiv64u() argument
87 : "0"(val), "ir"(mult), "r"(div) in __muldiv64u()
100 signed __muldiv64s(signed val, signed mult, signed div) in __muldiv64s() argument
108 : "0"(val), "ir"(mult), "r"(div) in __muldiv64s()
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| /arch/arm/boot/dts/ |
| D | omap36xx-omap3430es2plus-clocks.dtsi | 38 clock-mult = <1>;
54 clock-mult = <1>;
78 clock-mult = <1>;
86 clock-mult = <1>;
94 clock-mult = <1>;
102 clock-mult = <1>;
110 clock-mult = <1>;
118 clock-mult = <1>;
126 clock-mult = <1>;
134 clock-mult = <1>;
[all …]
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| D | am33xx-clocks.dtsi | 23 clock-mult = <1>;
31 clock-mult = <1>;
39 clock-mult = <1>;
47 clock-mult = <1>;
55 clock-mult = <1>;
63 clock-mult = <1>;
71 clock-mult = <1>;
79 clock-mult = <1>;
87 clock-mult = <1>;
95 clock-mult = <1>;
[all …]
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| D | am43xx-clocks.dtsi | 39 clock-mult = <1>;
47 clock-mult = <1>;
55 clock-mult = <1>;
63 clock-mult = <1>;
71 clock-mult = <1>;
79 clock-mult = <1>;
87 clock-mult = <1>;
95 clock-mult = <1>;
103 clock-mult = <1>;
321 clock-mult = <1>;
[all …]
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| D | r8a7794.dtsi | 295 clock-mult = <1>;
303 clock-mult = <1>;
311 clock-mult = <1>;
319 clock-mult = <1>;
327 clock-mult = <1>;
335 clock-mult = <1>;
343 clock-mult = <1>;
351 clock-mult = <1>;
359 clock-mult = <1>;
367 clock-mult = <1>;
[all …]
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| D | omap36xx-clocks.dtsi | 74 clock-mult = <1>;
78 clock-mult = <1>;
82 ti,clock-mult = <1>;
86 ti,clock-mult = <1>;
90 clock-mult = <1>;
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| D | keystone-clocks.dtsi | 31 clock-mult = <1>;
40 clock-mult = <1>;
69 clock-mult = <1>;
78 clock-mult = <1>;
87 clock-mult = <1>;
96 clock-mult = <1>;
105 clock-mult = <1>;
114 clock-mult = <1>;
123 clock-mult = <1>;
132 clock-mult = <1>;
[all …]
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| D | omap36xx-am35xx-omap3430es2plus-clocks.dtsi | 15 clock-mult = <1>;
23 clock-mult = <1>;
58 clock-mult = <1>;
66 clock-mult = <1>;
74 clock-mult = <1>;
82 clock-mult = <1>;
90 clock-mult = <1>;
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| D | omap3xxx-clocks.dtsi | 46 clock-mult = <2>;
54 clock-mult = <2>;
62 clock-mult = <2>;
70 clock-mult = <1>;
78 clock-mult = <1>;
215 clock-mult = <2>;
232 clock-mult = <1>;
257 clock-mult = <2>;
274 clock-mult = <1>;
304 clock-mult = <1>;
[all …]
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| /arch/x86/math-emu/ |
| D | poly.h | 34 asmlinkage void mul32_Xsig(Xsig *, const unsigned long mult);
35 asmlinkage void mul64_Xsig(Xsig *, const unsigned long long *mult);
36 asmlinkage void mul_Xsig_Xsig(Xsig *dest, const Xsig *mult);
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| /arch/mips/cavium-octeon/ |
| D | csrc-octeon.c | 104 u64 mult = clocksource_mips.mult; in sched_clock() local
118 : [cnt] "r" (cnt), [mult] "r" (mult), [shift] "r" (shift) in sched_clock()
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| /arch/arm/mach-davinci/ |
| D | clock.c | 410 u32 ctrl, mult = 1, prediv = 1, postdiv = 1; in clk_pllclk_recalc() local
420 mult = __raw_readl(pll->base + PLLM); in clk_pllclk_recalc()
422 mult = 2 * (mult & PLLM_PLLM_MASK); in clk_pllclk_recalc()
424 mult = (mult & PLLM_PLLM_MASK) + 1; in clk_pllclk_recalc()
450 rate *= mult; in clk_pllclk_recalc()
460 if (mult > 1) in clk_pllclk_recalc()
461 pr_debug("* %d ", mult); in clk_pllclk_recalc()
480 unsigned int mult, unsigned int postdiv) in davinci_set_pllrate() argument
502 if (mult) in davinci_set_pllrate()
503 mult = mult - 1; in davinci_set_pllrate()
[all …]
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| /arch/sh/kernel/cpu/sh4a/ |
| D | clock-sh7722.c | 57 unsigned long mult; in dll_recalc() local
60 mult = __raw_readl(DLLFRQ); in dll_recalc()
62 mult = 0; in dll_recalc()
64 return clk->parent->rate * mult; in dll_recalc()
79 unsigned long mult = 1; in pll_recalc() local
83 mult = (((__raw_readl(FRQCR) >> 24) & 0x1f) + 1); in pll_recalc()
87 return (clk->parent->rate * mult) / div; in pll_recalc()
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| D | clock-sh7366.c | 54 unsigned long mult; in dll_recalc() local
57 mult = __raw_readl(DLLFRQ); in dll_recalc()
59 mult = 0; in dll_recalc()
61 return clk->parent->rate * mult; in dll_recalc()
76 unsigned long mult = 1; in pll_recalc() local
80 mult = (((__raw_readl(FRQCR) >> 24) & 0x1f) + 1); in pll_recalc()
84 return (clk->parent->rate * mult) / div; in pll_recalc()
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| D | clock-sh7723.c | 58 unsigned long mult; in dll_recalc() local
61 mult = __raw_readl(DLLFRQ); in dll_recalc()
63 mult = 0; in dll_recalc()
65 return clk->parent->rate * mult; in dll_recalc()
80 unsigned long mult = 1; in pll_recalc() local
84 mult = (((__raw_readl(FRQCR) >> 24) & 0x1f) + 1); in pll_recalc()
88 return (clk->parent->rate * mult) / div; in pll_recalc()
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| D | clock-sh7343.c | 54 unsigned long mult; in dll_recalc() local
57 mult = __raw_readl(DLLFRQ); in dll_recalc()
59 mult = 0; in dll_recalc()
61 return clk->parent->rate * mult; in dll_recalc()
76 unsigned long mult = 1; in pll_recalc() local
79 mult = (((__raw_readl(FRQCR) >> 24) & 0x1f) + 1); in pll_recalc()
81 return clk->parent->rate * mult; in pll_recalc()
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| /arch/arm/mach-shmobile/ |
| D | timer.c | 27 unsigned int mult, unsigned int div) in shmobile_setup_delay_hz() argument
37 unsigned int value = HZ * div / mult; in shmobile_setup_delay_hz()
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| /arch/c6x/platforms/ |
| D | pll.c | 271 u32 ctrl, mult = 0, prediv = 0, postdiv = 0; in clk_pllclk_recalc() local
288 mult = pll_read(pll, PLLM); in clk_pllclk_recalc()
289 mult = (mult & PLLM_PLLM_MASK) + 1; in clk_pllclk_recalc()
309 if (mult) in clk_pllclk_recalc()
310 rate *= mult; in clk_pllclk_recalc()
317 prediv, mult, postdiv, rate / 1000000); in clk_pllclk_recalc()
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| /arch/tile/kernel/ |
| D | time.c | 247 return quot * dev->mult + ((rem * dev->mult) >> dev->shift); in ns2cycles()
267 vdso_data->mult = tk->tkr_mono.mult; in update_vsyscall()
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| /arch/arm/lib/ |
| D | delay.c | 52 static inline u64 cyc_to_ns(u64 cyc, u32 mult, u32 shift) in cyc_to_ns() argument
54 return (cyc * mult) >> shift; in cyc_to_ns()
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| /arch/x86/kernel/ |
| D | vsyscall_gtod.c | 37 vdata->mult = tk->tkr_mono.mult; in update_vsyscall()
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| /arch/arm64/kernel/vdso/ |
| D | gettimeofday.S | 66 .macro get_clock_shifted_nsec res, cycle_last, mult argument
75 mul \res, \res, \mult
155 get_clock_shifted_nsec res=x15, cycle_last=x10, mult=x11
220 get_clock_shifted_nsec res=x15, cycle_last=x10, mult=x11
241 get_clock_shifted_nsec res=x15, cycle_last=x10, mult=x11
263 get_clock_shifted_nsec res=x15, cycle_last=x10, mult=x11
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| /arch/blackfin/kernel/ |
| D | time-ts.c | 49 bfin_cs_cycles.mult, bfin_cs_cycles.shift); in bfin_cs_cycles_sched_clock()
99 bfin_cs_gptimer0.mult, bfin_cs_gptimer0.shift); in bfin_cs_gptimer0_sched_clock()
228 evt->mult = div_sc(clock_tick, NSEC_PER_SEC, evt->shift); in bfin_gptmr0_clockevent_init()
341 evt->mult = div_sc(clock_tick, NSEC_PER_SEC, evt->shift); in bfin_coretmr_clockevent_init()
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| /arch/arm/mach-goldfish/ |
| D | timer.c | 107 .mult = 1,
118 .mult = 1,
|