Home
last modified time | relevance | path

Searched refs:omap_ctrl_readl (Results 1 – 12 of 12) sorted by relevance

/arch/arm/mach-omap2/
Dcontrol.c161 u32 omap_ctrl_readl(u16 offset) in omap_ctrl_readl() function
415 control_context.sysconfig = omap_ctrl_readl(OMAP2_CONTROL_SYSCONFIG); in omap3_control_save_context()
416 control_context.devconf0 = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0); in omap3_control_save_context()
418 omap_ctrl_readl(OMAP343X_CONTROL_MEM_DFTRW0); in omap3_control_save_context()
420 omap_ctrl_readl(OMAP343X_CONTROL_MEM_DFTRW1); in omap3_control_save_context()
422 omap_ctrl_readl(OMAP2_CONTROL_MSUSPENDMUX_0); in omap3_control_save_context()
424 omap_ctrl_readl(OMAP2_CONTROL_MSUSPENDMUX_1); in omap3_control_save_context()
426 omap_ctrl_readl(OMAP2_CONTROL_MSUSPENDMUX_2); in omap3_control_save_context()
428 omap_ctrl_readl(OMAP2_CONTROL_MSUSPENDMUX_3); in omap3_control_save_context()
430 omap_ctrl_readl(OMAP2_CONTROL_MSUSPENDMUX_4); in omap3_control_save_context()
[all …]
Domap_phy_internal.c73 regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET); in am35x_musb_reset()
81 regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET); in am35x_musb_reset()
93 devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2); in am35x_musb_phy_power()
101 while (!(omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2) in am35x_musb_phy_power()
114 devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2); in am35x_musb_phy_power()
126 regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); in am35x_musb_clear_irq()
129 regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); in am35x_musb_clear_irq()
134 u32 devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2); in am35x_set_mode()
Dam35xx-emac.c29 v = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); in am35xx_enable_emac_int()
33 omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); /* OCP barrier */ in am35xx_enable_emac_int()
40 v = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); in am35xx_disable_emac_int()
43 omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); /* OCP barrier */ in am35xx_disable_emac_int()
110 v = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET); in am35xx_emac_init()
113 omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET); /* OCP barrier */ in am35xx_emac_init()
Dpdata-quirks.c51 reg = omap_ctrl_readl(OMAP343X_CONTROL_DEVCONF1); in hsmmc2_internal_input_clk()
120 v = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); in am35xx_enable_emac_int()
124 omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); /* OCP barrier */ in am35xx_enable_emac_int()
131 v = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); in am35xx_disable_emac_int()
134 omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); /* OCP barrier */ in am35xx_disable_emac_int()
146 v = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET); in am35xx_emac_reset()
149 omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET); /* OCP barrier */ in am35xx_emac_reset()
Dhsmmc.c67 reg = omap_ctrl_readl(OMAP243X_CONTROL_DEVCONF1); in omap_hsmmc1_before_set_reg()
76 reg = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0); in omap_hsmmc1_before_set_reg()
81 reg = omap_ctrl_readl(control_pbias_offset); in omap_hsmmc1_before_set_reg()
84 prog_io = omap_ctrl_readl(OMAP343X_CONTROL_PROG_IO1); in omap_hsmmc1_before_set_reg()
93 reg = omap_ctrl_readl(control_pbias_offset); in omap_hsmmc1_before_set_reg()
108 reg = omap_ctrl_readl(control_pbias_offset); in omap_hsmmc1_after_set_reg()
116 reg = omap_ctrl_readl(control_pbias_offset); in omap_hsmmc1_after_set_reg()
127 reg = omap_ctrl_readl(control_devconf1_offset); in hsmmc2_select_input_clk_src()
Did.c58 val = omap_ctrl_readl(OMAP24XX_CONTROL_STATUS); in omap_type()
60 val = omap_ctrl_readl(AM33XX_CONTROL_STATUS); in omap_type()
62 val = omap_ctrl_readl(OMAP343X_CONTROL_STATUS); in omap_type()
64 val = omap_ctrl_readl(OMAP4_CTRL_MODULE_CORE_STATUS); in omap_type()
66 val = omap_ctrl_readl(OMAP5XXX_CONTROL_STATUS); in omap_type()
266 status = omap_ctrl_readl(OMAP3_CONTROL_OMAP_STATUS); in omap3xxx_check_features()
325 status = omap_ctrl_readl(AM33XX_DEV_FEATURE); in am33xx_check_features()
Dboard-am3517evm.c233 devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2); in am3517_evm_musb_init()
250 devconf0 = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0); in am3517_evm_mcbsp1_init()
Dsr_device.c70 v = omap_ctrl_readl(volt_data[i].sr_efuse_offs); in sr_set_nvalues()
Dcontrol.h438 extern u32 omap_ctrl_readl(u16 offset);
465 #define omap_ctrl_readl(x) 0 macro
Dpm24xx.c86 l = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0) | OMAP24XX_USBSTANDBYCTRL; in omap2_enter_full_retention()
Dboard-omap3logic.c149 reg = omap_ctrl_readl(control_pbias_offset); in omap3torpedo_fix_pbias_voltage()
Dpm34xx.c83 omap_ctrl_writel(omap_ctrl_readl(OMAP343X_PADCONF_ETK_D14), in omap3_core_save_context()