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Searched refs:osc1 (Results 1 – 7 of 7) sorted by relevance

/arch/avr32/boards/favr-32/
Dsetup.c276 struct clk *osc1; in set_abdac_rate() local
283 osc1 = clk_get(NULL, "osc1"); in set_abdac_rate()
284 if (IS_ERR(osc1)) { in set_abdac_rate()
285 retval = PTR_ERR(osc1); in set_abdac_rate()
301 retval = clk_set_parent(pll1, osc1); in set_abdac_rate()
331 clk_put(osc1); in set_abdac_rate()
/arch/arm/boot/dts/
Dsocfpga.dtsi119 osc1: osc1 { label
144 clocks = <&osc1>;
198 clocks = <&osc1>, <&osc2>, <&f2s_periph_ref_clk>;
249 clocks = <&osc1>, <&osc2>, <&f2s_sdram_ref_clk>;
670 clocks = <&osc1>;
678 clocks = <&osc1>;
738 clocks = <&osc1>;
746 clocks = <&osc1>;
Dsocfpga_arria5.dtsi26 osc1 {
Dsocfpga_cyclone5.dtsi27 osc1 {
Dsocfpga_vt.dts38 osc1 {
Dversatile-ab.dts37 osc1: cm_aux_osc@24M { label
166 clocks = <&osc1>, <&pclk>;
/arch/avr32/mach-at32ap/
Dat32ap700x.c108 static struct clk osc1; variable
186 if (clk->parent == &osc1) in pll_set_rate()
279 else if (parent == &osc1) in pll1_set_parent()
306 static struct clk osc1 = { variable
572 if (parent == &osc1 || parent == &pll1) in genclk_set_parent()
599 parent = (control & PM_BIT(PLLSEL)) ? &pll1 : &osc1; in genclk_init_parent()
2206 &osc1,
2282 pll0.parent = &osc1; in setup_platform()
2284 pll1.parent = &osc1; in setup_platform()