1 /*
2 * Low-Level PCI Support for PC
3 *
4 * (c) 1999--2000 Martin Mares <mj@ucw.cz>
5 */
6
7 #include <linux/sched.h>
8 #include <linux/pci.h>
9 #include <linux/pci-acpi.h>
10 #include <linux/ioport.h>
11 #include <linux/init.h>
12 #include <linux/dmi.h>
13 #include <linux/slab.h>
14
15 #include <asm-generic/pci-bridge.h>
16 #include <asm/acpi.h>
17 #include <asm/segment.h>
18 #include <asm/io.h>
19 #include <asm/smp.h>
20 #include <asm/pci_x86.h>
21 #include <asm/setup.h>
22
23 unsigned int pci_probe = PCI_PROBE_BIOS | PCI_PROBE_CONF1 | PCI_PROBE_CONF2 |
24 PCI_PROBE_MMCONF;
25
26 unsigned int pci_early_dump_regs;
27 static int pci_bf_sort;
28 static int smbios_type_b1_flag;
29 int pci_routeirq;
30 int noioapicquirk;
31 #ifdef CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS
32 int noioapicreroute = 0;
33 #else
34 int noioapicreroute = 1;
35 #endif
36 int pcibios_last_bus = -1;
37 unsigned long pirq_table_addr;
38 const struct pci_raw_ops *__read_mostly raw_pci_ops;
39 const struct pci_raw_ops *__read_mostly raw_pci_ext_ops;
40
raw_pci_read(unsigned int domain,unsigned int bus,unsigned int devfn,int reg,int len,u32 * val)41 int raw_pci_read(unsigned int domain, unsigned int bus, unsigned int devfn,
42 int reg, int len, u32 *val)
43 {
44 if (domain == 0 && reg < 256 && raw_pci_ops)
45 return raw_pci_ops->read(domain, bus, devfn, reg, len, val);
46 if (raw_pci_ext_ops)
47 return raw_pci_ext_ops->read(domain, bus, devfn, reg, len, val);
48 return -EINVAL;
49 }
50
raw_pci_write(unsigned int domain,unsigned int bus,unsigned int devfn,int reg,int len,u32 val)51 int raw_pci_write(unsigned int domain, unsigned int bus, unsigned int devfn,
52 int reg, int len, u32 val)
53 {
54 if (domain == 0 && reg < 256 && raw_pci_ops)
55 return raw_pci_ops->write(domain, bus, devfn, reg, len, val);
56 if (raw_pci_ext_ops)
57 return raw_pci_ext_ops->write(domain, bus, devfn, reg, len, val);
58 return -EINVAL;
59 }
60
pci_read(struct pci_bus * bus,unsigned int devfn,int where,int size,u32 * value)61 static int pci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value)
62 {
63 return raw_pci_read(pci_domain_nr(bus), bus->number,
64 devfn, where, size, value);
65 }
66
pci_write(struct pci_bus * bus,unsigned int devfn,int where,int size,u32 value)67 static int pci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value)
68 {
69 return raw_pci_write(pci_domain_nr(bus), bus->number,
70 devfn, where, size, value);
71 }
72
73 struct pci_ops pci_root_ops = {
74 .read = pci_read,
75 .write = pci_write,
76 };
77
78 /*
79 * This interrupt-safe spinlock protects all accesses to PCI
80 * configuration space.
81 */
82 DEFINE_RAW_SPINLOCK(pci_config_lock);
83
can_skip_ioresource_align(const struct dmi_system_id * d)84 static int __init can_skip_ioresource_align(const struct dmi_system_id *d)
85 {
86 pci_probe |= PCI_CAN_SKIP_ISA_ALIGN;
87 printk(KERN_INFO "PCI: %s detected, can skip ISA alignment\n", d->ident);
88 return 0;
89 }
90
91 static const struct dmi_system_id can_skip_pciprobe_dmi_table[] __initconst = {
92 /*
93 * Systems where PCI IO resource ISA alignment can be skipped
94 * when the ISA enable bit in the bridge control is not set
95 */
96 {
97 .callback = can_skip_ioresource_align,
98 .ident = "IBM System x3800",
99 .matches = {
100 DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
101 DMI_MATCH(DMI_PRODUCT_NAME, "x3800"),
102 },
103 },
104 {
105 .callback = can_skip_ioresource_align,
106 .ident = "IBM System x3850",
107 .matches = {
108 DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
109 DMI_MATCH(DMI_PRODUCT_NAME, "x3850"),
110 },
111 },
112 {
113 .callback = can_skip_ioresource_align,
114 .ident = "IBM System x3950",
115 .matches = {
116 DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
117 DMI_MATCH(DMI_PRODUCT_NAME, "x3950"),
118 },
119 },
120 {}
121 };
122
dmi_check_skip_isa_align(void)123 void __init dmi_check_skip_isa_align(void)
124 {
125 dmi_check_system(can_skip_pciprobe_dmi_table);
126 }
127
pcibios_fixup_device_resources(struct pci_dev * dev)128 static void pcibios_fixup_device_resources(struct pci_dev *dev)
129 {
130 struct resource *rom_r = &dev->resource[PCI_ROM_RESOURCE];
131 struct resource *bar_r;
132 int bar;
133
134 if (pci_probe & PCI_NOASSIGN_BARS) {
135 /*
136 * If the BIOS did not assign the BAR, zero out the
137 * resource so the kernel doesn't attmept to assign
138 * it later on in pci_assign_unassigned_resources
139 */
140 for (bar = 0; bar <= PCI_STD_RESOURCE_END; bar++) {
141 bar_r = &dev->resource[bar];
142 if (bar_r->start == 0 && bar_r->end != 0) {
143 bar_r->flags = 0;
144 bar_r->end = 0;
145 }
146 }
147 }
148
149 if (pci_probe & PCI_NOASSIGN_ROMS) {
150 if (rom_r->parent)
151 return;
152 if (rom_r->start) {
153 /* we deal with BIOS assigned ROM later */
154 return;
155 }
156 rom_r->start = rom_r->end = rom_r->flags = 0;
157 }
158 }
159
160 /*
161 * Called after each bus is probed, but before its children
162 * are examined.
163 */
164
pcibios_fixup_bus(struct pci_bus * b)165 void pcibios_fixup_bus(struct pci_bus *b)
166 {
167 struct pci_dev *dev;
168
169 pci_read_bridge_bases(b);
170 list_for_each_entry(dev, &b->devices, bus_list)
171 pcibios_fixup_device_resources(dev);
172 }
173
pcibios_add_bus(struct pci_bus * bus)174 void pcibios_add_bus(struct pci_bus *bus)
175 {
176 acpi_pci_add_bus(bus);
177 }
178
pcibios_remove_bus(struct pci_bus * bus)179 void pcibios_remove_bus(struct pci_bus *bus)
180 {
181 acpi_pci_remove_bus(bus);
182 }
183
184 /*
185 * Only use DMI information to set this if nothing was passed
186 * on the kernel command line (which was parsed earlier).
187 */
188
set_bf_sort(const struct dmi_system_id * d)189 static int __init set_bf_sort(const struct dmi_system_id *d)
190 {
191 if (pci_bf_sort == pci_bf_sort_default) {
192 pci_bf_sort = pci_dmi_bf;
193 printk(KERN_INFO "PCI: %s detected, enabling pci=bfsort.\n", d->ident);
194 }
195 return 0;
196 }
197
read_dmi_type_b1(const struct dmi_header * dm,void * private_data)198 static void __init read_dmi_type_b1(const struct dmi_header *dm,
199 void *private_data)
200 {
201 u8 *d = (u8 *)dm + 4;
202
203 if (dm->type != 0xB1)
204 return;
205 switch (((*(u32 *)d) >> 9) & 0x03) {
206 case 0x00:
207 printk(KERN_INFO "dmi type 0xB1 record - unknown flag\n");
208 break;
209 case 0x01: /* set pci=bfsort */
210 smbios_type_b1_flag = 1;
211 break;
212 case 0x02: /* do not set pci=bfsort */
213 smbios_type_b1_flag = 2;
214 break;
215 default:
216 break;
217 }
218 }
219
find_sort_method(const struct dmi_system_id * d)220 static int __init find_sort_method(const struct dmi_system_id *d)
221 {
222 dmi_walk(read_dmi_type_b1, NULL);
223
224 if (smbios_type_b1_flag == 1) {
225 set_bf_sort(d);
226 return 0;
227 }
228 return -1;
229 }
230
231 /*
232 * Enable renumbering of PCI bus# ranges to reach all PCI busses (Cardbus)
233 */
234 #ifdef __i386__
assign_all_busses(const struct dmi_system_id * d)235 static int __init assign_all_busses(const struct dmi_system_id *d)
236 {
237 pci_probe |= PCI_ASSIGN_ALL_BUSSES;
238 printk(KERN_INFO "%s detected: enabling PCI bus# renumbering"
239 " (pci=assign-busses)\n", d->ident);
240 return 0;
241 }
242 #endif
243
set_scan_all(const struct dmi_system_id * d)244 static int __init set_scan_all(const struct dmi_system_id *d)
245 {
246 printk(KERN_INFO "PCI: %s detected, enabling pci=pcie_scan_all\n",
247 d->ident);
248 pci_add_flags(PCI_SCAN_ALL_PCIE_DEVS);
249 return 0;
250 }
251
252 static const struct dmi_system_id pciprobe_dmi_table[] __initconst = {
253 #ifdef __i386__
254 /*
255 * Laptops which need pci=assign-busses to see Cardbus cards
256 */
257 {
258 .callback = assign_all_busses,
259 .ident = "Samsung X20 Laptop",
260 .matches = {
261 DMI_MATCH(DMI_SYS_VENDOR, "Samsung Electronics"),
262 DMI_MATCH(DMI_PRODUCT_NAME, "SX20S"),
263 },
264 },
265 #endif /* __i386__ */
266 {
267 .callback = set_bf_sort,
268 .ident = "Dell PowerEdge 1950",
269 .matches = {
270 DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
271 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1950"),
272 },
273 },
274 {
275 .callback = set_bf_sort,
276 .ident = "Dell PowerEdge 1955",
277 .matches = {
278 DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
279 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1955"),
280 },
281 },
282 {
283 .callback = set_bf_sort,
284 .ident = "Dell PowerEdge 2900",
285 .matches = {
286 DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
287 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2900"),
288 },
289 },
290 {
291 .callback = set_bf_sort,
292 .ident = "Dell PowerEdge 2950",
293 .matches = {
294 DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
295 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2950"),
296 },
297 },
298 {
299 .callback = set_bf_sort,
300 .ident = "Dell PowerEdge R900",
301 .matches = {
302 DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
303 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge R900"),
304 },
305 },
306 {
307 .callback = find_sort_method,
308 .ident = "Dell System",
309 .matches = {
310 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc"),
311 },
312 },
313 {
314 .callback = set_bf_sort,
315 .ident = "HP ProLiant BL20p G3",
316 .matches = {
317 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
318 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL20p G3"),
319 },
320 },
321 {
322 .callback = set_bf_sort,
323 .ident = "HP ProLiant BL20p G4",
324 .matches = {
325 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
326 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL20p G4"),
327 },
328 },
329 {
330 .callback = set_bf_sort,
331 .ident = "HP ProLiant BL30p G1",
332 .matches = {
333 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
334 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL30p G1"),
335 },
336 },
337 {
338 .callback = set_bf_sort,
339 .ident = "HP ProLiant BL25p G1",
340 .matches = {
341 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
342 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL25p G1"),
343 },
344 },
345 {
346 .callback = set_bf_sort,
347 .ident = "HP ProLiant BL35p G1",
348 .matches = {
349 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
350 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL35p G1"),
351 },
352 },
353 {
354 .callback = set_bf_sort,
355 .ident = "HP ProLiant BL45p G1",
356 .matches = {
357 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
358 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL45p G1"),
359 },
360 },
361 {
362 .callback = set_bf_sort,
363 .ident = "HP ProLiant BL45p G2",
364 .matches = {
365 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
366 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL45p G2"),
367 },
368 },
369 {
370 .callback = set_bf_sort,
371 .ident = "HP ProLiant BL460c G1",
372 .matches = {
373 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
374 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL460c G1"),
375 },
376 },
377 {
378 .callback = set_bf_sort,
379 .ident = "HP ProLiant BL465c G1",
380 .matches = {
381 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
382 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL465c G1"),
383 },
384 },
385 {
386 .callback = set_bf_sort,
387 .ident = "HP ProLiant BL480c G1",
388 .matches = {
389 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
390 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL480c G1"),
391 },
392 },
393 {
394 .callback = set_bf_sort,
395 .ident = "HP ProLiant BL685c G1",
396 .matches = {
397 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
398 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL685c G1"),
399 },
400 },
401 {
402 .callback = set_bf_sort,
403 .ident = "HP ProLiant DL360",
404 .matches = {
405 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
406 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL360"),
407 },
408 },
409 {
410 .callback = set_bf_sort,
411 .ident = "HP ProLiant DL380",
412 .matches = {
413 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
414 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL380"),
415 },
416 },
417 #ifdef __i386__
418 {
419 .callback = assign_all_busses,
420 .ident = "Compaq EVO N800c",
421 .matches = {
422 DMI_MATCH(DMI_SYS_VENDOR, "Compaq"),
423 DMI_MATCH(DMI_PRODUCT_NAME, "EVO N800c"),
424 },
425 },
426 #endif
427 {
428 .callback = set_bf_sort,
429 .ident = "HP ProLiant DL385 G2",
430 .matches = {
431 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
432 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL385 G2"),
433 },
434 },
435 {
436 .callback = set_bf_sort,
437 .ident = "HP ProLiant DL585 G2",
438 .matches = {
439 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
440 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL585 G2"),
441 },
442 },
443 {
444 .callback = set_scan_all,
445 .ident = "Stratus/NEC ftServer",
446 .matches = {
447 DMI_MATCH(DMI_SYS_VENDOR, "Stratus"),
448 DMI_MATCH(DMI_PRODUCT_NAME, "ftServer"),
449 },
450 },
451 {
452 .callback = set_scan_all,
453 .ident = "Stratus/NEC ftServer",
454 .matches = {
455 DMI_MATCH(DMI_SYS_VENDOR, "NEC"),
456 DMI_MATCH(DMI_PRODUCT_NAME, "Express5800/R32"),
457 },
458 },
459 {
460 .callback = set_scan_all,
461 .ident = "Stratus/NEC ftServer",
462 .matches = {
463 DMI_MATCH(DMI_SYS_VENDOR, "NEC"),
464 DMI_MATCH(DMI_PRODUCT_NAME, "Express5800/R31"),
465 },
466 },
467 {}
468 };
469
dmi_check_pciprobe(void)470 void __init dmi_check_pciprobe(void)
471 {
472 dmi_check_system(pciprobe_dmi_table);
473 }
474
pcibios_scan_root(int busnum)475 void pcibios_scan_root(int busnum)
476 {
477 struct pci_bus *bus;
478 struct pci_sysdata *sd;
479 LIST_HEAD(resources);
480
481 sd = kzalloc(sizeof(*sd), GFP_KERNEL);
482 if (!sd) {
483 printk(KERN_ERR "PCI: OOM, skipping PCI bus %02x\n", busnum);
484 return;
485 }
486 sd->node = x86_pci_root_bus_node(busnum);
487 x86_pci_root_bus_resources(busnum, &resources);
488 printk(KERN_DEBUG "PCI: Probing PCI hardware (bus %02x)\n", busnum);
489 bus = pci_scan_root_bus(NULL, busnum, &pci_root_ops, sd, &resources);
490 if (!bus) {
491 pci_free_resource_list(&resources);
492 kfree(sd);
493 }
494 }
495
pcibios_set_cache_line_size(void)496 void __init pcibios_set_cache_line_size(void)
497 {
498 struct cpuinfo_x86 *c = &boot_cpu_data;
499
500 /*
501 * Set PCI cacheline size to that of the CPU if the CPU has reported it.
502 * (For older CPUs that don't support cpuid, we se it to 32 bytes
503 * It's also good for 386/486s (which actually have 16)
504 * as quite a few PCI devices do not support smaller values.
505 */
506 if (c->x86_clflush_size > 0) {
507 pci_dfl_cache_line_size = c->x86_clflush_size >> 2;
508 printk(KERN_DEBUG "PCI: pci_cache_line_size set to %d bytes\n",
509 pci_dfl_cache_line_size << 2);
510 } else {
511 pci_dfl_cache_line_size = 32 >> 2;
512 printk(KERN_DEBUG "PCI: Unknown cacheline size. Setting to 32 bytes\n");
513 }
514 }
515
pcibios_init(void)516 int __init pcibios_init(void)
517 {
518 if (!raw_pci_ops) {
519 printk(KERN_WARNING "PCI: System does not support PCI\n");
520 return 0;
521 }
522
523 pcibios_set_cache_line_size();
524 pcibios_resource_survey();
525
526 if (pci_bf_sort >= pci_force_bf)
527 pci_sort_breadthfirst();
528 return 0;
529 }
530
pcibios_setup(char * str)531 char *__init pcibios_setup(char *str)
532 {
533 if (!strcmp(str, "off")) {
534 pci_probe = 0;
535 return NULL;
536 } else if (!strcmp(str, "bfsort")) {
537 pci_bf_sort = pci_force_bf;
538 return NULL;
539 } else if (!strcmp(str, "nobfsort")) {
540 pci_bf_sort = pci_force_nobf;
541 return NULL;
542 }
543 #ifdef CONFIG_PCI_BIOS
544 else if (!strcmp(str, "bios")) {
545 pci_probe = PCI_PROBE_BIOS;
546 return NULL;
547 } else if (!strcmp(str, "nobios")) {
548 pci_probe &= ~PCI_PROBE_BIOS;
549 return NULL;
550 } else if (!strcmp(str, "biosirq")) {
551 pci_probe |= PCI_BIOS_IRQ_SCAN;
552 return NULL;
553 } else if (!strncmp(str, "pirqaddr=", 9)) {
554 pirq_table_addr = simple_strtoul(str+9, NULL, 0);
555 return NULL;
556 }
557 #endif
558 #ifdef CONFIG_PCI_DIRECT
559 else if (!strcmp(str, "conf1")) {
560 pci_probe = PCI_PROBE_CONF1 | PCI_NO_CHECKS;
561 return NULL;
562 }
563 else if (!strcmp(str, "conf2")) {
564 pci_probe = PCI_PROBE_CONF2 | PCI_NO_CHECKS;
565 return NULL;
566 }
567 #endif
568 #ifdef CONFIG_PCI_MMCONFIG
569 else if (!strcmp(str, "nommconf")) {
570 pci_probe &= ~PCI_PROBE_MMCONF;
571 return NULL;
572 }
573 else if (!strcmp(str, "check_enable_amd_mmconf")) {
574 pci_probe |= PCI_CHECK_ENABLE_AMD_MMCONF;
575 return NULL;
576 }
577 #endif
578 else if (!strcmp(str, "noacpi")) {
579 acpi_noirq_set();
580 return NULL;
581 }
582 else if (!strcmp(str, "noearly")) {
583 pci_probe |= PCI_PROBE_NOEARLY;
584 return NULL;
585 }
586 else if (!strcmp(str, "usepirqmask")) {
587 pci_probe |= PCI_USE_PIRQ_MASK;
588 return NULL;
589 } else if (!strncmp(str, "irqmask=", 8)) {
590 pcibios_irq_mask = simple_strtol(str+8, NULL, 0);
591 return NULL;
592 } else if (!strncmp(str, "lastbus=", 8)) {
593 pcibios_last_bus = simple_strtol(str+8, NULL, 0);
594 return NULL;
595 } else if (!strcmp(str, "rom")) {
596 pci_probe |= PCI_ASSIGN_ROMS;
597 return NULL;
598 } else if (!strcmp(str, "norom")) {
599 pci_probe |= PCI_NOASSIGN_ROMS;
600 return NULL;
601 } else if (!strcmp(str, "nobar")) {
602 pci_probe |= PCI_NOASSIGN_BARS;
603 return NULL;
604 } else if (!strcmp(str, "assign-busses")) {
605 pci_probe |= PCI_ASSIGN_ALL_BUSSES;
606 return NULL;
607 } else if (!strcmp(str, "use_crs")) {
608 pci_probe |= PCI_USE__CRS;
609 return NULL;
610 } else if (!strcmp(str, "nocrs")) {
611 pci_probe |= PCI_ROOT_NO_CRS;
612 return NULL;
613 } else if (!strcmp(str, "earlydump")) {
614 pci_early_dump_regs = 1;
615 return NULL;
616 } else if (!strcmp(str, "routeirq")) {
617 pci_routeirq = 1;
618 return NULL;
619 } else if (!strcmp(str, "skip_isa_align")) {
620 pci_probe |= PCI_CAN_SKIP_ISA_ALIGN;
621 return NULL;
622 } else if (!strcmp(str, "noioapicquirk")) {
623 noioapicquirk = 1;
624 return NULL;
625 } else if (!strcmp(str, "ioapicreroute")) {
626 if (noioapicreroute != -1)
627 noioapicreroute = 0;
628 return NULL;
629 } else if (!strcmp(str, "noioapicreroute")) {
630 if (noioapicreroute != -1)
631 noioapicreroute = 1;
632 return NULL;
633 }
634 return str;
635 }
636
pcibios_assign_all_busses(void)637 unsigned int pcibios_assign_all_busses(void)
638 {
639 return (pci_probe & PCI_ASSIGN_ALL_BUSSES) ? 1 : 0;
640 }
641
pcibios_add_device(struct pci_dev * dev)642 int pcibios_add_device(struct pci_dev *dev)
643 {
644 struct setup_data *data;
645 struct pci_setup_rom *rom;
646 u64 pa_data;
647
648 pa_data = boot_params.hdr.setup_data;
649 while (pa_data) {
650 data = ioremap(pa_data, sizeof(*rom));
651 if (!data)
652 return -ENOMEM;
653
654 if (data->type == SETUP_PCI) {
655 rom = (struct pci_setup_rom *)data;
656
657 if ((pci_domain_nr(dev->bus) == rom->segment) &&
658 (dev->bus->number == rom->bus) &&
659 (PCI_SLOT(dev->devfn) == rom->device) &&
660 (PCI_FUNC(dev->devfn) == rom->function) &&
661 (dev->vendor == rom->vendor) &&
662 (dev->device == rom->devid)) {
663 dev->rom = pa_data +
664 offsetof(struct pci_setup_rom, romdata);
665 dev->romlen = rom->pcilen;
666 }
667 }
668 pa_data = data->next;
669 iounmap(data);
670 }
671 return 0;
672 }
673
pcibios_enable_device(struct pci_dev * dev,int mask)674 int pcibios_enable_device(struct pci_dev *dev, int mask)
675 {
676 int err;
677
678 if ((err = pci_enable_resources(dev, mask)) < 0)
679 return err;
680
681 if (!pci_dev_msi_enabled(dev))
682 return pcibios_enable_irq(dev);
683 return 0;
684 }
685
pcibios_disable_device(struct pci_dev * dev)686 void pcibios_disable_device (struct pci_dev *dev)
687 {
688 if (!pci_dev_msi_enabled(dev) && pcibios_disable_irq)
689 pcibios_disable_irq(dev);
690 }
691
pci_ext_cfg_avail(void)692 int pci_ext_cfg_avail(void)
693 {
694 if (raw_pci_ext_ops)
695 return 1;
696 else
697 return 0;
698 }
699