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/arch/mips/include/asm/mach-pnx833x/
Dgpio.h56 static inline void pnx833x_gpio_select_input(unsigned int pin) in pnx833x_gpio_select_input() argument
58 if (pin < 32) in pnx833x_gpio_select_input()
59 CLEAR_REG_BIT(PNX833X_PIO_DIR, pin); in pnx833x_gpio_select_input()
61 CLEAR_REG_BIT(PNX833X_PIO_DIR2, pin & 31); in pnx833x_gpio_select_input()
63 static inline void pnx833x_gpio_select_output(unsigned int pin) in pnx833x_gpio_select_output() argument
65 if (pin < 32) in pnx833x_gpio_select_output()
66 SET_REG_BIT(PNX833X_PIO_DIR, pin); in pnx833x_gpio_select_output()
68 SET_REG_BIT(PNX833X_PIO_DIR2, pin & 31); in pnx833x_gpio_select_output()
72 static inline void pnx833x_gpio_select_function_io(unsigned int pin) in pnx833x_gpio_select_function_io() argument
74 if (pin < 32) in pnx833x_gpio_select_function_io()
[all …]
/arch/arm/boot/dts/
Ds5pv210-pinctrl.dtsi273 samsung,pin-function = <2>;
274 samsung,pin-pud = <0>;
275 samsung,pin-drv = <0>;
280 samsung,pin-function = <2>;
281 samsung,pin-pud = <0>;
282 samsung,pin-drv = <0>;
287 samsung,pin-function = <2>;
288 samsung,pin-pud = <0>;
289 samsung,pin-drv = <0>;
294 samsung,pin-function = <2>;
[all …]
Dexynos4210-pinctrl.dtsi2 * Samsung's Exynos4210 SoC pin-mux and pin-config device tree source
9 * Samsung's Exynos4210 SoC pin-mux and pin-config optiosn are listed as device
149 samsung,pin-function = <0x2>;
150 samsung,pin-pud = <0>;
151 samsung,pin-drv = <0>;
156 samsung,pin-function = <2>;
157 samsung,pin-pud = <0>;
158 samsung,pin-drv = <0>;
163 samsung,pin-function = <2>;
164 samsung,pin-pud = <0>;
[all …]
Dexynos5420-pinctrl.dtsi2 * Samsung's Exynos5420 SoC pin-mux and pin-config device tree source
7 * Samsung's Exynos5420 SoC pin-mux and pin-config options are listed as device
65 samsung,pin-function = <3>;
66 samsung,pin-pud = <0>;
67 samsung,pin-drv = <0>;
157 samsung,pin-function = <2>;
158 samsung,pin-pud = <0>;
159 samsung,pin-drv = <3>;
164 samsung,pin-function = <2>;
165 samsung,pin-pud = <0>;
[all …]
Dexynos4x12-pinctrl.dtsi2 * Samsung's Exynos4x12 SoCs pin-mux and pin-config device tree source
7 * Samsung's Exynos4x12 SoCs pin-mux and pin-config optiosn are listed as device
123 samsung,pin-function = <0x2>;
124 samsung,pin-pud = <0>;
125 samsung,pin-drv = <0>;
130 samsung,pin-function = <2>;
131 samsung,pin-pud = <0>;
132 samsung,pin-drv = <0>;
137 samsung,pin-function = <2>;
138 samsung,pin-pud = <0>;
[all …]
Dexynos5250-pinctrl.dtsi2 * Samsung's Exynos5250 SoC pin-mux and pin-config device tree source
7 * Samsung's Exynos5250 SoC pin-mux and pin-config optiosn are listed as device
204 samsung,pin-function = <2>;
205 samsung,pin-pud = <0>;
206 samsung,pin-drv = <0>;
211 samsung,pin-function = <2>;
212 samsung,pin-pud = <0>;
213 samsung,pin-drv = <0>;
218 samsung,pin-function = <3>;
219 samsung,pin-pud = <3>;
[all …]
Dexynos3250-pinctrl.dtsi2 * Samsung's Exynos3250 SoCs pin-mux and pin-config device tree source
7 * Samsung's Exynos3250 SoCs pin-mux and pin-config optiosn are listed as device
74 samsung,pin-function = <0x2>;
75 samsung,pin-pud = <0>;
76 samsung,pin-drv = <0>;
81 samsung,pin-function = <2>;
82 samsung,pin-pud = <0>;
83 samsung,pin-drv = <0>;
88 samsung,pin-function = <2>;
89 samsung,pin-pud = <0>;
[all …]
Ds3c64xx-pinctrl.dtsi3 * - pin control-related definitions
7 * Samsung's S3C64xx SoCs pin banks, pin-mux and pin-config options are
141 samsung,pin-function = <2>;
142 samsung,pin-pud = <PIN_PULL_NONE>;
147 samsung,pin-function = <2>;
148 samsung,pin-pud = <PIN_PULL_NONE>;
153 samsung,pin-function = <2>;
154 samsung,pin-pud = <PIN_PULL_NONE>;
159 samsung,pin-function = <2>;
160 samsung,pin-pud = <PIN_PULL_NONE>;
[all …]
Dexynos5260-pinctrl.dtsi2 * Samsung's Exynos5260 SoC pin-mux and pin-config device tree source
7 * Samsung's Exynos5260 SoC pin-mux and pin-config options are listed as device
190 samsung,pin-function = <2>;
191 samsung,pin-pud = <PIN_PULL_NONE>;
192 samsung,pin-drv = <0>;
197 samsung,pin-function = <2>;
198 samsung,pin-pud = <PIN_PULL_NONE>;
199 samsung,pin-drv = <0>;
204 samsung,pin-function = <2>;
205 samsung,pin-pud = <PIN_PULL_NONE>;
[all …]
Dsama5d3_lcd.dtsi26 AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A LCDD0 pin */
27 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA1 periph A LCDD1 pin */
28 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA2 periph A LCDD2 pin */
29 AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA3 periph A LCDD3 pin */
30 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA4 periph A LCDD4 pin */
31 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA5 periph A LCDD5 pin */
32 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA6 periph A LCDD6 pin */
33 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA7 periph A LCDD7 pin */
34 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA8 periph A LCDD8 pin */
35 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA9 periph A LCDD9 pin */
[all …]
Ds3c2416-pinctrl.dtsi86 samsung,pin-function = <2>;
91 samsung,pin-function = <2>;
96 samsung,pin-function = <2>;
101 samsung,pin-function = <2>;
106 samsung,pin-function = <2>;
111 samsung,pin-function = <2>;
116 samsung,pin-function = <2>;
121 samsung,pin-function = <2>;
126 samsung,pin-function = <2>;
131 samsung,pin-function = <2>;
[all …]
/arch/arm/mach-orion5x/
Dboard-rd88f5182.c42 int pin; in rd88f5182_pci_preinit() local
47 pin = RD88F5182_PCI_SLOT0_IRQ_A_PIN; in rd88f5182_pci_preinit()
48 if (gpio_request(pin, "PCI IntA") == 0) { in rd88f5182_pci_preinit()
49 if (gpio_direction_input(pin) == 0) { in rd88f5182_pci_preinit()
50 irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); in rd88f5182_pci_preinit()
53 "set_irq_type pin %d\n", pin); in rd88f5182_pci_preinit()
54 gpio_free(pin); in rd88f5182_pci_preinit()
57 printk(KERN_ERR "rd88f5182_pci_preinit failed to request gpio %d\n", pin); in rd88f5182_pci_preinit()
60 pin = RD88F5182_PCI_SLOT0_IRQ_B_PIN; in rd88f5182_pci_preinit()
61 if (gpio_request(pin, "PCI IntB") == 0) { in rd88f5182_pci_preinit()
[all …]
Drd88f5182-setup.c113 int pin; in rd88f5182_pci_preinit() local
118 pin = RD88F5182_PCI_SLOT0_IRQ_A_PIN; in rd88f5182_pci_preinit()
119 if (gpio_request(pin, "PCI IntA") == 0) { in rd88f5182_pci_preinit()
120 if (gpio_direction_input(pin) == 0) { in rd88f5182_pci_preinit()
121 irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); in rd88f5182_pci_preinit()
124 "set_irq_type pin %d\n", pin); in rd88f5182_pci_preinit()
125 gpio_free(pin); in rd88f5182_pci_preinit()
128 printk(KERN_ERR "rd88f5182_pci_preinit failed to request gpio %d\n", pin); in rd88f5182_pci_preinit()
131 pin = RD88F5182_PCI_SLOT0_IRQ_B_PIN; in rd88f5182_pci_preinit()
132 if (gpio_request(pin, "PCI IntB") == 0) { in rd88f5182_pci_preinit()
[all …]
Dts209-setup.c111 int pin; in qnap_ts209_pci_preinit() local
116 pin = QNAP_TS209_PCI_SLOT0_IRQ_PIN; in qnap_ts209_pci_preinit()
117 if (gpio_request(pin, "PCI Int1") == 0) { in qnap_ts209_pci_preinit()
118 if (gpio_direction_input(pin) == 0) { in qnap_ts209_pci_preinit()
119 irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); in qnap_ts209_pci_preinit()
122 "set_irq_type pin %d\n", pin); in qnap_ts209_pci_preinit()
123 gpio_free(pin); in qnap_ts209_pci_preinit()
127 "%d\n", pin); in qnap_ts209_pci_preinit()
130 pin = QNAP_TS209_PCI_SLOT1_IRQ_PIN; in qnap_ts209_pci_preinit()
131 if (gpio_request(pin, "PCI Int2") == 0) { in qnap_ts209_pci_preinit()
[all …]
Ddb88f5281-setup.c207 int pin; in db88f5281_pci_preinit() local
212 pin = DB88F5281_PCI_SLOT0_IRQ_PIN; in db88f5281_pci_preinit()
213 if (gpio_request(pin, "PCI Int1") == 0) { in db88f5281_pci_preinit()
214 if (gpio_direction_input(pin) == 0) { in db88f5281_pci_preinit()
215 irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); in db88f5281_pci_preinit()
218 "set_irq_type pin %d\n", pin); in db88f5281_pci_preinit()
219 gpio_free(pin); in db88f5281_pci_preinit()
222 printk(KERN_ERR "db88f5281_pci_preinit failed to gpio_request %d\n", pin); in db88f5281_pci_preinit()
225 pin = DB88F5281_PCI_SLOT1_SLOT2_IRQ_PIN; in db88f5281_pci_preinit()
226 if (gpio_request(pin, "PCI Int2") == 0) { in db88f5281_pci_preinit()
[all …]
/arch/arm/mach-s3c24xx/
Dpm.c77 static void s3c_pm_check_resume_pin(unsigned int pin, unsigned int irqoffs) in s3c_pm_check_resume_pin() argument
81 int irq = gpio_to_irq(pin); in s3c_pm_check_resume_pin()
88 pinstate = s3c_gpio_getcfg(pin); in s3c_pm_check_resume_pin()
92 S3C_PMDBG("Leaving IRQ %d (pin %d) as is\n", irq, pin); in s3c_pm_check_resume_pin()
95 S3C_PMDBG("Disabling IRQ %d (pin %d)\n", irq, pin); in s3c_pm_check_resume_pin()
96 s3c_gpio_cfgpin(pin, S3C2410_GPIO_INPUT); in s3c_pm_check_resume_pin()
108 int pin; in s3c_pm_configure_extint() local
115 for (pin = S3C2410_GPF(0); pin <= S3C2410_GPF(7); pin++) { in s3c_pm_configure_extint()
116 s3c_pm_check_resume_pin(pin, pin - S3C2410_GPF(0)); in s3c_pm_configure_extint()
119 for (pin = S3C2410_GPG(0); pin <= S3C2410_GPG(7); pin++) { in s3c_pm_configure_extint()
[all …]
/arch/arm/mach-imx/
Diomux-v1.c61 unsigned int port, unsigned int pin, int on) in imx_iomuxv1_set_puen() argument
63 unsigned long mask = 1 << pin; in imx_iomuxv1_set_puen()
69 unsigned int port, unsigned int pin, int out) in imx_iomuxv1_set_ddir() argument
71 unsigned long mask = 1 << pin; in imx_iomuxv1_set_ddir()
77 unsigned int port, unsigned int pin, int af) in imx_iomuxv1_set_gpr() argument
79 unsigned long mask = 1 << pin; in imx_iomuxv1_set_gpr()
85 unsigned int port, unsigned int pin, int inuse) in imx_iomuxv1_set_gius() argument
87 unsigned long mask = 1 << pin; in imx_iomuxv1_set_gius()
93 unsigned int port, unsigned int pin, unsigned int ocr) in imx_iomuxv1_set_ocr() argument
95 unsigned long shift = (pin & 0xf) << 1; in imx_iomuxv1_set_ocr()
[all …]
Diomux-imx31.c71 void mxc_iomux_set_pad(enum iomux_pins pin, u32 config) in mxc_iomux_set_pad() argument
76 pin &= IOMUX_PADNUM_MASK; in mxc_iomux_set_pad()
77 reg = IOMUXSW_PAD_CTL + (pin + 2) / 3 * 4; in mxc_iomux_set_pad()
78 field = (pin + 2) % 3; in mxc_iomux_set_pad()
81 __func__, (pin + 2) / 3, field); in mxc_iomux_set_pad()
98 int mxc_iomux_alloc_pin(unsigned int pin, const char *label) in mxc_iomux_alloc_pin() argument
100 unsigned pad = pin & IOMUX_PADNUM_MASK; in mxc_iomux_alloc_pin()
113 mxc_iomux_mode(pin); in mxc_iomux_alloc_pin()
138 void mxc_iomux_release_pin(unsigned int pin) in mxc_iomux_release_pin() argument
140 unsigned pad = pin & IOMUX_PADNUM_MASK; in mxc_iomux_release_pin()
/arch/sh/drivers/pci/
Dfixups-cayman.c8 int __init pcibios_map_platform_irq(const struct pci_dev *dev, u8 slot, u8 pin) in pcibios_map_platform_irq() argument
33 int pin; in pcibios_map_platform_irq() member
40 pin = path[i].pin = pci_swizzle_interrupt_pin(dev, pin); in pcibios_map_platform_irq()
54 result = IRQ_INTA + pci_swizzle_interrupt_pin(dev, pin) - 1; in pcibios_map_platform_irq()
58 pin = path[i].pin; in pcibios_map_platform_irq()
66 pin = path[i].pin; in pcibios_map_platform_irq()
68 result = IRQ_P2INTA + (pin - 1); in pcibios_map_platform_irq()
/arch/arm/plat-orion/
Dgpio.c96 __set_direction(struct orion_gpio_chip *ochip, unsigned pin, int input) in __set_direction() argument
102 u |= 1 << pin; in __set_direction()
104 u &= ~(1 << pin); in __set_direction()
108 static void __set_level(struct orion_gpio_chip *ochip, unsigned pin, int high) in __set_level() argument
114 u |= 1 << pin; in __set_level()
116 u &= ~(1 << pin); in __set_level()
121 __set_blinking(struct orion_gpio_chip *ochip, unsigned pin, int blink) in __set_blinking() argument
127 u |= 1 << pin; in __set_blinking()
129 u &= ~(1 << pin); in __set_blinking()
134 orion_gpio_is_valid(struct orion_gpio_chip *ochip, unsigned pin, int mode) in orion_gpio_is_valid() argument
[all …]
/arch/arm/mach-at91/
Dgpio.h191 extern int __init_or_module at91_set_GPIO_periph(unsigned pin, int use_pullup);
192 extern int __init_or_module at91_set_A_periph(unsigned pin, int use_pullup);
193 extern int __init_or_module at91_set_B_periph(unsigned pin, int use_pullup);
194 extern int __init_or_module at91_set_C_periph(unsigned pin, int use_pullup);
195 extern int __init_or_module at91_set_D_periph(unsigned pin, int use_pullup);
196 extern int __init_or_module at91_set_gpio_input(unsigned pin, int use_pullup);
197 extern int __init_or_module at91_set_gpio_output(unsigned pin, int value);
198 extern int __init_or_module at91_set_deglitch(unsigned pin, int is_on);
199 extern int __init_or_module at91_set_debounce(unsigned pin, int is_on, int div);
200 extern int __init_or_module at91_set_multi_drive(unsigned pin, int is_on);
[all …]
Dgpio.c94 static inline void __iomem *pin_to_controller(unsigned pin) in pin_to_controller() argument
96 pin /= MAX_NB_GPIO_PER_BANK; in pin_to_controller()
97 if (likely(pin < gpio_banks)) in pin_to_controller()
98 return gpio_chip[pin].regbase; in pin_to_controller()
103 static inline unsigned pin_to_mask(unsigned pin) in pin_to_mask() argument
105 return 1 << (pin % MAX_NB_GPIO_PER_BANK); in pin_to_mask()
147 int __init_or_module at91_set_GPIO_periph(unsigned pin, int use_pullup) in at91_set_GPIO_periph() argument
149 void __iomem *pio = pin_to_controller(pin); in at91_set_GPIO_periph()
150 unsigned mask = pin_to_mask(pin); in at91_set_GPIO_periph()
165 int __init_or_module at91_set_A_periph(unsigned pin, int use_pullup) in at91_set_A_periph() argument
[all …]
/arch/cris/arch-v32/mach-a3/
Dio.c101 unsigned int port, unsigned int pin) in crisv32_io_get() argument
108 iopin->bit = 1 << pin; in crisv32_io_get()
111 if (crisv32_pinmux_alloc(port, pin, pin, pinmux_gpio)) in crisv32_io_get()
120 int pin; in crisv32_io_get_name() local
130 pin = simple_strtoul(name, NULL, 10); in crisv32_io_get_name()
132 if (pin < 0 || pin > crisv32_ioports[port].pin_count) in crisv32_io_get_name()
135 iopin->bit = 1 << pin; in crisv32_io_get_name()
138 if (crisv32_pinmux_alloc(port, pin, pin, pinmux_gpio)) in crisv32_io_get_name()
/arch/cris/arch-v32/mach-fs/
Dio.c134 unsigned int port, unsigned int pin) in crisv32_io_get() argument
141 iopin->bit = 1 << pin; in crisv32_io_get()
146 if (port != 0 && crisv32_pinmux_alloc(port - 1, pin, pin, pinmux_gpio)) in crisv32_io_get()
149 pin, port)); in crisv32_io_get()
157 int pin; in crisv32_io_get_name() local
167 pin = simple_strtoul(name, NULL, 10); in crisv32_io_get_name()
169 if (pin < 0 || pin > crisv32_ioports[port].pin_count) in crisv32_io_get_name()
172 iopin->bit = 1 << pin; in crisv32_io_get_name()
177 if (port != 0 && crisv32_pinmux_alloc(port - 1, pin, pin, pinmux_gpio)) in crisv32_io_get_name()
182 pin, port)); in crisv32_io_get_name()
/arch/arm/mach-ixp4xx/
Dgtwx5715-pci.c52 static int __init gtwx5715_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) in gtwx5715_map_irq() argument
56 if ((slot == SLOT0_DEVID && pin == 1) || in gtwx5715_map_irq()
57 (slot == SLOT1_DEVID && pin == 2)) in gtwx5715_map_irq()
59 else if ((slot == SLOT0_DEVID && pin == 2) || in gtwx5715_map_irq()
60 (slot == SLOT1_DEVID && pin == 1)) in gtwx5715_map_irq()
64 __func__, slot, pin, rc); in gtwx5715_map_irq()

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