| /arch/sh/kernel/cpu/sh4a/ |
| D | clock-sh7722.c | 42 static struct clk r_clk = { variable
73 .parent = &r_clk,
100 &r_clk,
157 [HWBLK_CMT] = SH_CLK_MSTP32(&r_clk, MSTPCR0, 14, 0),
158 [HWBLK_RWDT] = SH_CLK_MSTP32(&r_clk, MSTPCR0, 13, 0),
165 [HWBLK_RTC] = SH_CLK_MSTP32(&r_clk, MSTPCR1, 8, 0),
168 [HWBLK_KEYSC] = SH_CLK_MSTP32(&r_clk, MSTPCR2, 14, 0),
183 CLKDEV_CON_ID("rclk", &r_clk),
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| D | clock-sh7723.c | 43 static struct clk r_clk = { variable
74 .parent = &r_clk,
101 &r_clk,
167 [HWBLK_CMT] = SH_CLK_MSTP32(&r_clk, MSTPCR0, 14, 0),
168 [HWBLK_RWDT] = SH_CLK_MSTP32(&r_clk, MSTPCR0, 13, 0),
183 [HWBLK_RTC] = SH_CLK_MSTP32(&r_clk, MSTPCR1, 8, 0),
193 [HWBLK_KEYSC] = SH_CLK_MSTP32(&r_clk, MSTPCR2, 14, 0),
208 CLKDEV_CON_ID("rclk", &r_clk),
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| D | clock-sh7343.c | 39 static struct clk r_clk = { variable
70 .parent = &r_clk,
94 &r_clk,
163 [MSTP014] = MSTP(&r_clk, MSTPCR0, 14, 0),
164 [MSTP013] = MSTP(&r_clk, MSTPCR0, 13, 0),
183 [MSTP214] = MSTP(&r_clk, MSTPCR2, 14, 0),
199 CLKDEV_CON_ID("rclk", &r_clk),
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| D | clock-sh7724.c | 46 static struct clk r_clk = { variable
79 .parent = &r_clk,
128 &r_clk,
228 [HWBLK_CMT] = SH_CLK_MSTP32(&r_clk, MSTPCR0, 14, 0),
229 [HWBLK_RWDT] = SH_CLK_MSTP32(&r_clk, MSTPCR0, 13, 0),
241 [HWBLK_KEYSC] = SH_CLK_MSTP32(&r_clk, MSTPCR1, 12, 0),
242 [HWBLK_RTC] = SH_CLK_MSTP32(&r_clk, MSTPCR1, 11, 0),
273 CLKDEV_CON_ID("rclk", &r_clk),
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| D | clock-sh7366.c | 39 static struct clk r_clk = { variable
70 .parent = &r_clk,
97 &r_clk,
166 [MSTP014] = MSTP(&r_clk, MSTPCR0, 14, 0),
167 [MSTP013] = MSTP(&r_clk, MSTPCR0, 13, 0),
197 CLKDEV_CON_ID("rclk", &r_clk),
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| /arch/sh/kernel/cpu/sh2a/ |
| D | clock-sh7264.c | 32 static struct clk r_clk = { variable
61 &r_clk,
104 [MSTP30] = SH_CLK_MSTP8(&r_clk, STBCR3, 0, 0), /* RTC */
109 CLKDEV_CON_ID("rclk", &r_clk),
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| D | clock-sh7269.c | 29 static struct clk r_clk = { variable
87 &r_clk,
138 [MSTP30] = SH_CLK_MSTP8(&r_clk, STBCR3, 0, 0), /* RTC */
143 CLKDEV_CON_ID("rclk", &r_clk),
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| /arch/arm/mach-shmobile/ |
| D | clock-r8a7740.c | 122 static struct clk r_clk = { variable
281 &r_clk,
496 [MSTP329] = SH_CLK_MSTP32(&r_clk, SMSTPCR3, 29, 0), /* CMT10 */
524 CLKDEV_CON_ID("r_clk", &r_clk),
640 r_clk.parent = &extal1_div2048_clk; in r8a7740_clock_init()
643 r_clk.parent = &extal1_div1024_clk; in r8a7740_clock_init()
647 r_clk.parent = &extalr_clk; in r8a7740_clock_init()
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| D | clock-sh7372.c | 67 static struct clk r_clk = { variable
277 &r_clk,
460 [MSTP405] = MSTP(&r_clk, SMSTPCR4, 5, 0), /* CMT4 */
461 [MSTP404] = MSTP(&r_clk, SMSTPCR4, 4, 0), /* CMT3 */
462 [MSTP403] = MSTP(&r_clk, SMSTPCR4, 3, 0), /* KEYSC */
463 [MSTP400] = MSTP(&r_clk, SMSTPCR4, 0, 0), /* CMT2 */
469 CLKDEV_CON_ID("r_clk", &r_clk),
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| D | clock-sh73a0.c | 67 static struct clk r_clk = { variable
172 &r_clk,
587 [MSTP329] = MSTP(&r_clk, SMSTPCR3, 29, 0), /* CMT10 */
603 [MSTP403] = MSTP(&r_clk, SMSTPCR4, 3, 0), /* KEYSC */
615 CLKDEV_CON_ID("r_clk", &r_clk),
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