/arch/x86/mm/ |
D | amdtopology.c | 39 header = read_pci_config(0, num, 0, 0x00); in find_northbridge() 45 header = read_pci_config(0, num, 1, 0x00); in find_northbridge() 90 reg = read_pci_config(0, nb, 0, 0x60); in amd_numa_init() 101 base = read_pci_config(0, nb, 1, 0x40 + i*8); in amd_numa_init() 102 limit = read_pci_config(0, nb, 1, 0x44 + i*8); in amd_numa_init()
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/arch/x86/kernel/ |
D | aperture_64.c | 150 aper_low = read_pci_config(bus, slot, func, 0x10); in read_agp() 151 aper_hi = read_pci_config(bus, slot, func, 0x14); in read_agp() 199 class = read_pci_config(bus, slot, func, in search_agp_bridge() 281 if (!early_is_amd_nb(read_pci_config(bus, slot, 3, 0x00))) in early_gart_iommu_check() 284 ctl = read_pci_config(bus, slot, 3, AMD64_GARTAPERTURECTL); in early_gart_iommu_check() 288 aper_base = read_pci_config(bus, slot, 3, AMD64_GARTAPERTUREBASE) & 0x7fff; in early_gart_iommu_check() 337 if (!early_is_amd_nb(read_pci_config(bus, slot, 3, 0x00))) in early_gart_iommu_check() 340 ctl = read_pci_config(bus, slot, 3, AMD64_GARTAPERTURECTL); in early_gart_iommu_check() 379 if (!early_is_amd_nb(read_pci_config(bus, slot, 3, 0x00))) in gart_iommu_hole_init() 386 ctl = read_pci_config(bus, slot, 3, in gart_iommu_hole_init() [all …]
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D | vsmp_64.c | 96 cfg = read_pci_config(0, 0x1f, 0, PCI_BASE_ADDRESS_0); in set_vsmp_pv_ops() 150 if (read_pci_config(0, 0x1f, 0, PCI_VENDOR_ID) == in detect_vsmp_box() 190 cfg = read_pci_config(0, 0x1f, 0, PCI_BASE_ADDRESS_0); in vsmp_cap_cpus()
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D | mmconf-fam10h_64.c | 82 id = read_pci_config(bus, slot, 0, PCI_VENDOR_ID); in get_fam10h_pci_mmconf_base() 122 reg = read_pci_config(bus, slot, 1, 0x80 + (i << 3)); in get_fam10h_pci_mmconf_base() 127 reg = read_pci_config(bus, slot, 1, 0x84 + (i << 3)); in get_fam10h_pci_mmconf_base()
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D | early-quirks.c | 41 htcfg = read_pci_config(num, slot, func, 0x68); in fix_hypertransport_config() 126 d = read_pci_config(num, slot, func, 0x70); in ati_ixp4x0_rev() 130 d = read_pci_config(num, slot, func, 0x8); in ati_ixp4x0_rev() 165 d = read_pci_config(num, slot, func, 0x8); in ati_sbx00_rev() 191 d = read_pci_config(num, slot, func, 0x64); in ati_bugs_contd() 252 base = read_pci_config(num, slot, func, 0x5c); in intel_stolen_base() 612 addr = read_pci_config(bus, slot, func, PCI_BASE_ADDRESS_0); in apple_airport_reset() 613 addr |= (u64)read_pci_config(bus, slot, func, PCI_BASE_ADDRESS_1) << 32; in apple_airport_reset()
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D | pci-calgary_64.c | 1295 val = read_pci_config(bus, dev, 0, 0); in calgary_bus_has_devices() 1335 val = read_pci_config(bus, 0, 0, 0); in get_tce_space_from_tar() 1436 val = read_pci_config(bus, 0, 0, 0); in detect_calgary()
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/arch/x86/pci/ |
D | amd_bus.c | 91 id = read_pci_config(bus, slot, 0, PCI_VENDOR_ID); in early_root_info_init() 115 reg = read_pci_config(bus, slot, 1, in early_root_info_init() 142 reg = read_pci_config(bus, slot, 0, AMD_NB_F0_NODE_ID); in early_root_info_init() 144 reg = read_pci_config(bus, slot, 0, AMD_NB_F0_UNIT_ID); in early_root_info_init() 151 reg = read_pci_config(bus, slot, 1, 0xc0 + (i << 3)); in early_root_info_init() 156 reg = read_pci_config(bus, slot, 1, 0xc4 + (i << 3)); in early_root_info_init() 217 reg = read_pci_config(bus, slot, 1, 0x80 + (i << 3)); in early_root_info_init() 223 reg = read_pci_config(bus, slot, 1, 0x84 + (i << 3)); in early_root_info_init() 370 u32 val = read_pci_config(bus, slot, 3, 0); in pci_enable_pci_io_ecs() 375 val = read_pci_config(bus, slot, 3, 0x8c); in pci_enable_pci_io_ecs()
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D | early.c | 10 u32 read_pci_config(u8 bus, u8 slot, u8 func, u8 offset) in read_pci_config() function 72 val = read_pci_config(bus, slot, func, i); in early_dump_pci_device() 94 class = read_pci_config(bus, slot, func, in early_dump_pci_devices()
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D | broadcom_bus.c | 104 id = read_pci_config(bus, slot, 0, PCI_VENDOR_ID); in broadcom_postcore_init()
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/arch/powerpc/kernel/ |
D | rtas_pci.c | 44 static int read_pci_config; variable 81 ret = rtas_call(read_pci_config, 2, 2, &returnval, addr, size); in rtas_read_config() 232 read_pci_config = rtas_token("read-pci-config"); in init_pci_config_tokens()
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/arch/x86/include/asm/ |
D | pci-direct.h | 9 extern u32 read_pci_config(u8 bus, u8 slot, u8 func, u8 offset);
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/arch/x86/kernel/cpu/ |
D | amd.c | 522 val = read_pci_config(0, 24, 0, 0x68); in early_init_amd()
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