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Searched refs:rv (Results 1 – 25 of 59) sorted by relevance

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/arch/x86/lib/
Dmsr-smp.c8 struct msr_info *rv = info; in __rdmsr_on_cpu() local
12 if (rv->msrs) in __rdmsr_on_cpu()
13 reg = per_cpu_ptr(rv->msrs, this_cpu); in __rdmsr_on_cpu()
15 reg = &rv->reg; in __rdmsr_on_cpu()
17 rdmsr(rv->msr_no, reg->l, reg->h); in __rdmsr_on_cpu()
22 struct msr_info *rv = info; in __wrmsr_on_cpu() local
26 if (rv->msrs) in __wrmsr_on_cpu()
27 reg = per_cpu_ptr(rv->msrs, this_cpu); in __wrmsr_on_cpu()
29 reg = &rv->reg; in __wrmsr_on_cpu()
31 wrmsr(rv->msr_no, reg->l, reg->h); in __wrmsr_on_cpu()
[all …]
/arch/x86/mm/
Dpf_in.c138 rv = type; \
149 enum reason_type rv = OTHERS; in get_ins_type() local
160 return rv; in get_ins_type()
254 unsigned char *rv = NULL; in get_reg_w8() local
258 rv = (unsigned char *)&regs->ax; in get_reg_w8()
261 rv = (unsigned char *)&regs->bx; in get_reg_w8()
264 rv = (unsigned char *)&regs->cx; in get_reg_w8()
267 rv = (unsigned char *)&regs->dx; in get_reg_w8()
271 rv = (unsigned char *)&regs->r8; in get_reg_w8()
274 rv = (unsigned char *)&regs->r9; in get_reg_w8()
[all …]
/arch/arm/include/debug/
Dtegra.S54 #define checkuart(rp, rv, lhu, bit, uart) \ argument
76 .macro addruart, rp, rv, tmp
78 ldr \rv, [\rp] @ linked addr is stored there
79 sub \rv, \rv, \rp @ offset between the two
81 sub \tmp, \rp, \rv @ actual tegra_uart_config
85 mov \rv, #0 @ yes; record init is done
86 str \rv, [\tmp]
92 lsr \rv, \rp, #18 @ 19:18 are console type
93 and \rv, \rv, #3
94 cmp \rv, #2 @ 2 and 3 mean DCC, UART
[all …]
Dvexpress.S25 .macro addruart,rp,rv,tmp
34 movw \rv, #0xc091
35 movt \rv, #0x410f
36 cmp \rp, \rv
40 orreq \rv, \rp, #DEBUG_LL_VIRT_BASE
45 orrne \rv, \rp, #DEBUG_LL_VIRT_BASE
Ds5pv210.S22 .macro addruart, rp, rv, tmp
24 ldr \rv, =S3C_VA_UART
27 add \rv, \rv, #(0x400 * CONFIG_DEBUG_S3C_UART)
Dexynos.S23 .macro addruart, rp, rv, tmp
29 ldr \rv, =S3C_VA_UART
32 add \rv, \rv, #(0x10000 * CONFIG_DEBUG_S3C_UART)
Dvf.S20 .macro addruart, rp, rv, tmp
22 and \rv, \rp, #0xffffff @ offset within 16MB section
23 add \rv, \rv, #VF_UART_VIRTUAL_BASE
Domap2plus.S67 .macro addruart, rp, rv, tmp
71 ldr \rv, [\rp] @ get absolute addr of 99f
72 sub \rv, \rv, \rp @ offset between the two
74 sub \tmp, \rp, \rv @ make it effective
76 ldr \rv, [\tmp, #4] @ omap_uart_virt
78 cmpne \rv, #0
171 add \rv, \rv, \tmp
Ds3c24xx.S19 .macro addruart, rp, rv, tmp
21 ldr \rv, = CONFIG_DEBUG_UART_VIRT
Dvt8500.S18 .macro addruart, rp, rv, tmp
20 orr \rv, \rp, #DEBUG_LL_VIRT_BASE
/arch/ia64/include/asm/sn/
Dsn_sal.h627 struct ia64_sal_retval rv; in sn_partition_reserved_page_pa() local
628 ia64_sal_oemcall_reentrant(&rv, SN_SAL_GET_PARTITION_ADDR, *cookie, in sn_partition_reserved_page_pa()
630 *cookie = rv.v0; in sn_partition_reserved_page_pa()
631 *addr = rv.v1; in sn_partition_reserved_page_pa()
632 *len = rv.v2; in sn_partition_reserved_page_pa()
633 return rv.status; in sn_partition_reserved_page_pa()
785 struct ia64_sal_retval rv = {0, 0, 0, 0}; in ia64_sn_sysctl_iobrick_pci_op() local
787 SAL_CALL_NOLOCK(rv, SN_SAL_SYSCTL_IOBRICK_PCI_OP, connection_type, n, action, in ia64_sn_sysctl_iobrick_pci_op()
789 if (rv.status) in ia64_sn_sysctl_iobrick_pci_op()
790 return rv.v0; in ia64_sn_sysctl_iobrick_pci_op()
[all …]
/arch/ia64/kernel/
Dbrl_emu.c61 struct illegal_op_return rv; in ia64_emulate_brl() local
64 rv.fkt = (unsigned long) -1; in ia64_emulate_brl()
71 return rv; in ia64_emulate_brl()
76 if (ia64_psr(regs)->ri != 1) return rv; in ia64_emulate_brl()
79 if ((bundle[0] & 0x1e) != 0x4) return rv; in ia64_emulate_brl()
97 if (btype != 0) return rv; in ia64_emulate_brl()
98 rv.fkt = 0; in ia64_emulate_brl()
106 return rv; in ia64_emulate_brl()
114 rv.fkt = 0; in ia64_emulate_brl()
122 return rv; in ia64_emulate_brl()
[all …]
/arch/arm/mach-s3c64xx/include/mach/
Ddebug-macro.S24 .macro addruart, rp, rv, tmp
26 ldr \rv, = (S3C_VA_UART + S3C_PA_UART & 0xfffff)
29 add \rv, \rv, #(0x400 * CONFIG_DEBUG_S3C_UART)
/arch/arm/mach-sa1100/include/mach/
Ddebug-macro.S15 .macro addruart, rp, rv, tmp
27 ldr \rv, [\rp, #UTCR3]
28 tst \rv, #UTCR3_TXE
32 ldreq \rv, [\rp, #UTCR3]
33 tsteq \rv, #UTCR3_TXE
37 ldreq \rv, [\rp, #UTCR3]
38 tsteq \rv, #UTCR3_TXE
43 orr \rv, \rp, #0xf8000000 @ virtual
/arch/powerpc/platforms/pseries/
Dreconfig.c234 int length, rv = 0; in do_add_node() local
256 rv = -ENOMEM; in do_add_node()
262 rv = -EINVAL; in do_add_node()
266 rv = pSeries_reconfig_add_node(path, prop); in do_add_node()
269 if (rv) in do_add_node()
271 return rv; in do_add_node()
277 int rv = -ENODEV; in do_remove_node() local
280 rv = pSeries_reconfig_remove_node(node); in do_remove_node()
283 return rv; in do_remove_node()
398 int rv = 0; in ofdt_write() local
[all …]
/arch/arm/mach-omap1/include/mach/
Ddebug-macro.S29 .macro addruart, rp, rv, tmp
33 ldr \rv, [\rp] @ get absolute addr of 99f
34 sub \rv, \rv, \rp @ offset between the two
36 sub \tmp, \rp, \rv @ make it effective
38 ldr \rv, [\tmp, #4] @ omap_uart_virt
40 cmpne \rv, #0
45 ldr \rv, =OMAP_UART_INFO_OFS
46 ldr \rp, [\rp, \rv]
/arch/um/drivers/
Dvde_user.c99 int rv; in vde_user_read() local
104 rv = vde_recv(vconn, buf, len, 0); in vde_user_read()
105 if (rv < 0) { in vde_user_read()
110 else if (rv == 0) in vde_user_read()
113 return rv; in vde_user_read()
/arch/mips/math-emu/
Dcp1emu.c1672 } rv; /* resulting value */ in fpu_emu() local
1734 SPFROMREG(rv.s, MIPSInst_FS(ir)); in fpu_emu()
1743 SPFROMREG(rv.s, MIPSInst_FS(ir)); in fpu_emu()
1752 SPFROMREG(rv.s, MIPSInst_FS(ir)); in fpu_emu()
1759 SPFROMREG(rv.s, MIPSInst_FT(ir)); in fpu_emu()
1760 if (rv.w & 0x1) in fpu_emu()
1761 rv.w = 0; in fpu_emu()
1763 SPFROMREG(rv.s, MIPSInst_FS(ir)); in fpu_emu()
1770 SPFROMREG(rv.s, MIPSInst_FT(ir)); in fpu_emu()
1771 if (rv.w & 0x1) in fpu_emu()
[all …]
/arch/blackfin/include/uapi/asm/
Dswab.h28 __u32 rv; in __arch_swahw32() local
29 __asm__("%0 = PACK(%1.L, %1.H);\n\t": "=d"(rv): "d"(xx)); in __arch_swahw32()
30 return rv; in __arch_swahw32()
/arch/ia64/sn/kernel/
Dtiocx.c255 struct ia64_sal_retval rv; in tiocx_intr_alloc() local
256 rv.status = 0; in tiocx_intr_alloc()
257 rv.v0 = 0; in tiocx_intr_alloc()
259 ia64_sal_oemcall_nolock(&rv, SN_SAL_IOIF_INTERRUPT, in tiocx_intr_alloc()
263 return rv.status; in tiocx_intr_alloc()
269 struct ia64_sal_retval rv; in tiocx_intr_free() local
270 rv.status = 0; in tiocx_intr_free()
271 rv.v0 = 0; in tiocx_intr_free()
273 ia64_sal_oemcall_nolock(&rv, SN_SAL_IOIF_INTERRUPT, in tiocx_intr_free()
414 int rv; in tiocx_reload() local
[all …]
Dbte.c274 bte_result_t rv; in bte_unaligned_copy() local
348 rv = bte_copy(footBteSource, in bte_unaligned_copy()
351 if (rv != BTE_SUCCESS) { in bte_unaligned_copy()
353 return rv; in bte_unaligned_copy()
366 rv = bte_copy((src + headBcopyLen), in bte_unaligned_copy()
371 if (rv != BTE_SUCCESS) { in bte_unaligned_copy()
373 return rv; in bte_unaligned_copy()
396 rv = bte_copy(headBteSource, in bte_unaligned_copy()
399 if (rv != BTE_SUCCESS) { in bte_unaligned_copy()
401 return rv; in bte_unaligned_copy()
/arch/arm/mach-goldfish/
Dtimer.c45 cycle_t rv; in goldfish_timer_read() local
48 rv = readl(timer_base + TIMER_TIME_LOW); in goldfish_timer_read()
49 rv |= (int64_t)readl(timer_base + TIMER_TIME_HIGH) << 32; in goldfish_timer_read()
51 return rv; in goldfish_timer_read()
/arch/arm/mach-goldfish/include/mach/
Ddebug-macro.S22 .macro addruart, rp, rv, rtmp
24 ldr \rv, =GOLDFISH_TTY_PUT_CHAR_BASE
/arch/mips/cavium-octeon/
Dcsrc-octeon.c103 unsigned long long rv; in sched_clock() local
117 : [rv] "=&r" (rv), [t1] "=&r" (t1), [t2] "=&r" (t2), [t3] "=&r" (t3) in sched_clock()
120 return rv; in sched_clock()
/arch/x86/boot/
Dvideo-mode.c149 int rv; in set_mode() local
160 rv = raw_set_mode(mode, &real_mode); in set_mode()
161 if (rv) in set_mode()
162 return rv; in set_mode()

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