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Searched refs:sparc_config (Results 1 – 9 of 9) sorted by relevance

/arch/sparc/kernel/
Dtime_32.c100 sparc_config.clear_clock_irq(); in timer_interrupt()
103 sparc_config.clear_clock_irq(); in timer_interrupt()
141 ce->mult = div_sc(sparc_config.clock_rate, NSEC_PER_SEC, in setup_timer_ce()
155 offset += sparc_config.cs_period; in sbus_cycles_offset()
169 offset = sparc_config.get_cycles_offset(); in timer_cs_read()
173 cycles *= sparc_config.cs_period; in timer_cs_read()
191 timer_cs.mult = clocksource_hz2mult(sparc_config.clock_rate, in setup_timer_cs()
205 sparc_config.load_profile_irq(cpu, in percpu_ce_setup()
211 sparc_config.load_profile_irq(cpu, 0); in percpu_ce_setup()
224 sparc_config.load_profile_irq(cpu, next); in percpu_ce_set_next_event()
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Dsun4m_irq.c386 sparc_config.cs_period = SBUS_CLOCK_RATE * 2; /* 2 seconds */ in sun4m_init_timers()
387 sparc_config.features |= FEAT_L14_ONESHOT; in sun4m_init_timers()
389 sparc_config.cs_period = SBUS_CLOCK_RATE / HZ; /* 1/HZ sec */ in sun4m_init_timers()
390 sparc_config.features |= FEAT_L10_CLOCKEVENT; in sun4m_init_timers()
392 sparc_config.features |= FEAT_L10_CLOCKSOURCE; in sun4m_init_timers()
393 sbus_writel(timer_value(sparc_config.cs_period), in sun4m_init_timers()
467 sparc_config.init_timers = sun4m_init_timers; in sun4m_init_IRQ()
468 sparc_config.build_device_irq = sun4m_build_device_irq; in sun4m_init_IRQ()
469 sparc_config.clock_rate = SBUS_CLOCK_RATE; in sun4m_init_IRQ()
470 sparc_config.clear_clock_irq = sun4m_clear_clock_irq; in sun4m_init_IRQ()
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Dsun4d_irq.c461 sparc_config.cs_period = SBUS_CLOCK_RATE * 2; /* 2 seconds */ in sun4d_init_timers()
463 sparc_config.cs_period = SBUS_CLOCK_RATE / HZ; /* 1/HZ sec */ in sun4d_init_timers()
464 sparc_config.features |= FEAT_L10_CLOCKEVENT; in sun4d_init_timers()
466 sparc_config.features |= FEAT_L10_CLOCKSOURCE; in sun4d_init_timers()
467 sbus_writel(timer_value(sparc_config.cs_period), in sun4d_init_timers()
511 sparc_config.init_timers = sun4d_init_timers; in sun4d_init_IRQ()
512 sparc_config.build_device_irq = sun4d_build_device_irq; in sun4d_init_IRQ()
513 sparc_config.clock_rate = SBUS_CLOCK_RATE; in sun4d_init_IRQ()
514 sparc_config.clear_clock_irq = sun4d_clear_clock_irq; in sun4d_init_IRQ()
515 sparc_config.load_profile_irq = sun4d_load_profile_irq; in sun4d_init_IRQ()
Dirq.h56 struct sparc_config { struct
76 extern struct sparc_config sparc_config; argument
Dleon_kernel.c316 sparc_config.get_cycles_offset = leon_cycles_offset; in leon_init_timers()
317 sparc_config.cs_period = 1000000 / HZ; in leon_init_timers()
318 sparc_config.features |= FEAT_L10_CLOCKSOURCE; in leon_init_timers()
321 sparc_config.features |= FEAT_L10_CLOCKEVENT; in leon_init_timers()
519 sparc_config.init_timers = leon_init_timers; in leon_init_IRQ()
520 sparc_config.build_device_irq = _leon_build_device_irq; in leon_init_IRQ()
521 sparc_config.clock_rate = 1000000; in leon_init_IRQ()
522 sparc_config.clear_clock_irq = leon_clear_clock_irq; in leon_init_IRQ()
523 sparc_config.load_profile_irq = leon_load_profile_irq; in leon_init_IRQ()
Dpcic.c716 sparc_config.clock_rate = SBUS_CLOCK_RATE / HZ; in pci_time_init()
717 sparc_config.features |= FEAT_L10_CLOCKEVENT; in pci_time_init()
719 sparc_config.features |= FEAT_L10_CLOCKSOURCE; in pci_time_init()
720 sparc_config.get_cycles_offset = pcic_cycles_offset; in pci_time_init()
849 sparc_config.build_device_irq = pcic_build_device_irq; in sun4m_pci_init_IRQ()
850 sparc_config.clear_clock_irq = pcic_clear_clock_irq; in sun4m_pci_init_IRQ()
851 sparc_config.load_profile_irq = pcic_load_profile_irq; in sun4m_pci_init_IRQ()
Dirq_32.c28 struct sparc_config sparc_config; variable
Dof_device_32.c359 sparc_config.build_device_irq(op, intr[i].pri); in scan_one_device()
368 sparc_config.build_device_irq(op, irq[i]); in scan_one_device()
Dsun4m_smp.c253 sparc_config.load_profile_irq(cpu, 0); /* Is this needless? */ in smp4m_percpu_timer_interrupt()