| /arch/parisc/kernel/ |
| D | pacache.S | 93 mtsp %r20, %sr1
99 pitlbe 0(%sr1, %r28)
100 pitlbe,m %arg1(%sr1, %r28) /* Last pitlbe and addr adjust */
108 mtsp %r20, %sr1
114 pitlbe,m %arg1(%sr1, %r28) /* pitlbe for one loop */
136 mtsp %r20, %sr1
142 pdtlbe 0(%sr1, %r28)
143 pdtlbe,m %arg1(%sr1, %r28) /* Last pdtlbe and addr adjust */
151 mtsp %r20, %sr1
157 pdtlbe,m %arg1(%sr1, %r28) /* pdtlbe for one loop */
[all …]
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| D | entry.S | 1210 mfsp %sr1,t0 /* Save sr1 so we can use it in tlb inserts */
1211 mtsp spc,%sr1
1213 idtlba pte,(%sr1,va)
1214 idtlbp prot,(%sr1,va)
1216 mtsp t0, %sr1 /* Restore sr1 */
1244 mfsp %sr1,t0 /* Save sr1 so we can use it in tlb inserts */
1245 mtsp spc,%sr1
1247 idtlba pte,(%sr1,va)
1248 idtlbp prot,(%sr1,va)
1250 mtsp t0, %sr1 /* Restore sr1 */
[all …]
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| D | head.S | 217 mtsp %r0,%sr1
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| D | syscall.S | 286 mfsp %sr1,%r2
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| /arch/parisc/lib/ |
| D | lusercopy.S | 54 mtsp %r1,%sr1
78 1: stbs,ma %r0,1(%sr1,%r26)
110 1: ldbs,ma 1(%sr1,%r26),%r1
114 2: ldbs,ma 1(%sr1,%r26),%r1
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| /arch/powerpc/platforms/cell/ |
| D | beat_spu_priv1.c | 109 static void mfc_sr1_set(struct spu *spu, u64 sr1) in mfc_sr1_set() argument
113 offsetof(struct spu_priv1, mfc_sr1_RW), sr1); in mfc_sr1_set()
118 u64 sr1; in mfc_sr1_get() local
121 offsetof(struct spu_priv1, mfc_sr1_RW), &sr1); in mfc_sr1_get()
122 return sr1; in mfc_sr1_get()
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| D | spu_priv1_mmio.c | 113 static void mfc_sr1_set(struct spu *spu, u64 sr1) in mfc_sr1_set() argument
115 out_be64(&spu->priv1->mfc_sr1_RW, sr1); in mfc_sr1_set()
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| /arch/powerpc/platforms/ps3/ |
| D | spu.c | 102 u64 sr1; member
368 spu_pdata(spu)->cache.sr1 = 0x33; in ps3_create_spu()
549 static void mfc_sr1_set(struct spu *spu, u64 sr1) in mfc_sr1_set() argument
556 BUG_ON((sr1 & allowed) != (spu_pdata(spu)->cache.sr1 & allowed)); in mfc_sr1_set()
558 spu_pdata(spu)->cache.sr1 = sr1; in mfc_sr1_set()
562 spu_pdata(spu)->cache.sr1); in mfc_sr1_set()
567 return spu_pdata(spu)->cache.sr1; in mfc_sr1_get()
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| /arch/powerpc/platforms/cell/spufs/ |
| D | run.c | 85 u64 sr1; in spu_setup_isolated() local
124 sr1 = spu_mfc_sr1_get(ctx->spu); in spu_setup_isolated()
125 sr1 &= ~MFC_STATE1_PROBLEM_STATE_MASK; in spu_setup_isolated()
126 spu_mfc_sr1_set(ctx->spu, sr1); in spu_setup_isolated()
168 sr1 |= MFC_STATE1_PROBLEM_STATE_MASK; in spu_setup_isolated()
169 spu_mfc_sr1_set(ctx->spu, sr1); in spu_setup_isolated()
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| D | hw_ops.c | 242 u64 sr1; in spu_hw_master_start() local
245 sr1 = spu_mfc_sr1_get(spu) | MFC_STATE1_MASTER_RUN_CONTROL_MASK; in spu_hw_master_start()
246 spu_mfc_sr1_set(spu, sr1); in spu_hw_master_start()
253 u64 sr1; in spu_hw_master_stop() local
256 sr1 = spu_mfc_sr1_get(spu) & ~MFC_STATE1_MASTER_RUN_CONTROL_MASK; in spu_hw_master_stop()
257 spu_mfc_sr1_set(spu, sr1); in spu_hw_master_stop()
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| D | backing_ops.c | 311 u64 sr1; in spu_backing_master_start() local
314 sr1 = csa->priv1.mfc_sr1_RW | MFC_STATE1_MASTER_RUN_CONTROL_MASK; in spu_backing_master_start()
315 csa->priv1.mfc_sr1_RW = sr1; in spu_backing_master_start()
322 u64 sr1; in spu_backing_master_stop() local
325 sr1 = csa->priv1.mfc_sr1_RW & ~MFC_STATE1_MASTER_RUN_CONTROL_MASK; in spu_backing_master_stop()
326 csa->priv1.mfc_sr1_RW = sr1; in spu_backing_master_stop()
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| /arch/score/include/asm/ |
| D | user.h | 11 unsigned long sr1; /* lcr */ member
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| /arch/powerpc/include/asm/ |
| D | spu_priv1.h | 43 void (*mfc_sr1_set) (struct spu *spu, u64 sr1);
123 spu_mfc_sr1_set (struct spu *spu, u64 sr1) in spu_mfc_sr1_set() argument
125 spu_priv1_ops->mfc_sr1_set(spu, sr1); in spu_mfc_sr1_set()
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| /arch/score/include/uapi/asm/ |
| D | ptrace.h | 54 unsigned long sr1; /* lcr */ member
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| /arch/parisc/include/asm/ |
| D | asmregs.h | 83 sr1: .reg %sr1
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| D | assembly.h | 435 SAVE_SP (%sr1, PT_SR1 (\regs))
474 REST_SP (%sr1, PT_SR1 (\regs))
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| /arch/score/kernel/ |
| D | asm-offsets.c | 74 OFFSET(PT_SR1, pt_regs, sr1); in output_ptreg_defines()
|