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Searched refs:tsr (Results 1 – 11 of 11) sorted by relevance

/arch/c6x/include/asm/
Dptrace.h23 #define user_mode(regs) ((((regs)->tsr) & 0x40) != 0)
/arch/powerpc/kvm/
Dbooke.c574 if ((vcpu->arch.tsr & (TSR_ENW | TSR_WIS)) != (TSR_ENW | TSR_WIS)) in arm_next_watchdog()
593 u32 tsr, new_tsr; in kvmppc_watchdog_func() local
597 new_tsr = tsr = vcpu->arch.tsr; in kvmppc_watchdog_func()
601 if (tsr & TSR_ENW) { in kvmppc_watchdog_func()
602 if (tsr & TSR_WIS) in kvmppc_watchdog_func()
605 new_tsr = tsr | TSR_WIS; in kvmppc_watchdog_func()
607 new_tsr = tsr | TSR_ENW; in kvmppc_watchdog_func()
609 } while (cmpxchg(&vcpu->arch.tsr, tsr, new_tsr) != tsr); in kvmppc_watchdog_func()
640 if ((vcpu->arch.tcr & TCR_DIE) && (vcpu->arch.tsr & TSR_DIS)) in update_timer_ints()
645 if ((vcpu->arch.tcr & TCR_WIE) && (vcpu->arch.tsr & TSR_WIS)) in update_timer_ints()
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Dbooke_emulate.c454 *spr_val = vcpu->arch.tsr; in kvmppc_booke_emulate_mfspr()
/arch/c6x/kernel/
Dprocess.c103 regs->tsr |= 0x40; /* set user mode */ in start_thread()
Dasm-offsets.c83 OFFSET(REGS_TSR, pt_regs, tsr); in foo()
/arch/m68k/include/asm/
Dbvme6000hw.h40 pad_A[3], tsr, member
/arch/c6x/include/uapi/asm/
Dptrace.h120 REG_PAIR(tsr, orig_a4);
/arch/powerpc/include/uapi/asm/
Dkvm.h215 __u32 tsr; /* KVM_SREGS_E_UPDATE_TSR */ member
/arch/blackfin/include/asm/
Dbfin_serial.h229 u32 tsr; member
/arch/powerpc/include/asm/
Dkvm_host.h514 ulong tsr; /* we need to perform set/clr_bits() which requires ulong */ member
/arch/mips/include/asm/octeon/
Dcvmx-pci-defs.h2288 uint64_t tsr:36; member
2290 uint64_t tsr:36;