Searched refs:vals (Results 1 – 3 of 3) sorted by relevance
| /arch/c6x/platforms/ |
| D | dscr.c | 299 u32 vals[3]; in dscr_parse_silicon_rev() local
302 err = of_property_read_u32_array(node, "ti,dscr-silicon-rev", vals, 3); in dscr_parse_silicon_rev()
304 c6x_silicon_rev = soc_readl(base + vals[0]); in dscr_parse_silicon_rev()
305 c6x_silicon_rev >>= vals[1]; in dscr_parse_silicon_rev()
306 c6x_silicon_rev &= vals[2]; in dscr_parse_silicon_rev()
330 u32 vals[10], fuse; in dscr_parse_mac_fuse() local
334 vals, 10); in dscr_parse_mac_fuse()
339 fuse = soc_readl(base + vals[f * 5]); in dscr_parse_mac_fuse()
341 if (vals[j] && vals[j] <= 6) in dscr_parse_mac_fuse()
342 c6x_fuse_mac[vals[j] - 1] = fuse >> i; in dscr_parse_mac_fuse()
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| /arch/tile/kernel/ |
| D | backtrace.c | 107 static const int vals[2] = { TREG_SP, TREG_SP }; in bt_has_addi_sp() local
110 find_matching_insn(bundle, TILE_OPC_ADDI, vals, 2); in bt_has_addi_sp()
112 insn = find_matching_insn(bundle, TILE_OPC_ADDLI, vals, 2); in bt_has_addi_sp()
115 insn = find_matching_insn(bundle, TILEGX_OPC_ADDXLI, vals, 2); in bt_has_addi_sp()
117 insn = find_matching_insn(bundle, TILEGX_OPC_ADDXI, vals, 2); in bt_has_addi_sp()
199 static const int vals[2] = { 52, TREG_SP }; in bt_has_move_r52_sp() local
200 return find_matching_insn(bundle, TILE_OPC_MOVE, vals, 2) != NULL; in bt_has_move_r52_sp()
206 static const int vals[2] = { TREG_SP, TREG_LR }; in bt_has_sw_sp_lr() local
207 return find_matching_insn(bundle, OPCODE_STORE, vals, 2) != NULL; in bt_has_sw_sp_lr()
234 static const int vals[2] = { TREG_SP, TREG_SP }; in bt_has_add_sp() local
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| /arch/arm/plat-samsung/include/plat/ |
| D | cpu-freq-core.h | 101 struct s3c_pllval *vals; member
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