/arch/x86/include/asm/ |
D | percpu.h | 27 #define PER_CPU(var, reg) \ 29 lea var(reg), reg 30 #define PER_CPU_VAR(var) %__percpu_seg:var 32 #define PER_CPU(var, reg) __percpu_mov_op $var, reg 33 #define PER_CPU_VAR(var) var 37 #define INIT_PER_CPU_VAR(var) init_per_cpu__##var 39 #define INIT_PER_CPU_VAR(var) var 76 #define DECLARE_INIT_PER_CPU(var) \ argument 77 extern typeof(var) init_per_cpu_var(var) 80 #define init_per_cpu_var(var) init_per_cpu__##var argument [all …]
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D | rmwcc.h | 6 #define __GEN_RMWcc(fullop, var, cc, ...) \ argument 9 : : "m" (var), ## __VA_ARGS__ \ 16 #define GEN_UNARY_RMWcc(op, var, arg0, cc) \ argument 17 __GEN_RMWcc(op " " arg0, var, cc) 19 #define GEN_BINARY_RMWcc(op, var, vcon, val, arg0, cc) \ argument 20 __GEN_RMWcc(op " %1, " arg0, var, cc, vcon (val)) 24 #define __GEN_RMWcc(fullop, var, cc, ...) \ argument 28 : "+m" (var), "=qm" (c) \ 33 #define GEN_UNARY_RMWcc(op, var, arg0, cc) \ argument 34 __GEN_RMWcc(op " " arg0, var, cc) [all …]
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D | barrier.h | 90 #define set_mb(var, value) do { (void)xchg(&var, value); } while (0) argument 96 #define set_mb(var, value) do { var = value; barrier(); } while (0) argument
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D | debugreg.h | 14 #define get_debugreg(var, register) \ argument 15 (var) = native_get_debugreg(register)
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/arch/ia64/include/asm/ |
D | percpu.h | 12 # define THIS_CPU(var) (var) /* use this to mark accesses to per-CPU variables... */ 42 #define __ia64_per_cpu_var(var) (*({ \ argument 43 __verify_pcpu_ptr(&(var)); \ 44 ((typeof(var) __kernel __force *)&(var)); \
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D | barrier.h | 86 #define set_mb(var, value) do { (var) = (value); mb(); } while (0) argument
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/arch/arm/mach-rpc/include/mach/ |
D | acornfb.h | 13 #define acornfb_bandwidth(var) ((var)->pixclock * 8 / (var)->bits_per_pixel) argument 16 acornfb_valid_pixrate(struct fb_var_screeninfo *var) in acornfb_valid_pixrate() argument 20 if (!var->pixclock) in acornfb_valid_pixrate() 35 return acornfb_bandwidth(var) >= limit; in acornfb_valid_pixrate() 83 struct fb_var_screeninfo *var) in acornfb_vidc20_find_rates() argument 88 div = var->pixclock / 9090; /*9921*/ in acornfb_vidc20_find_rates() 122 unsigned long bandwidth = acornfb_bandwidth(var); in acornfb_vidc20_find_rates() 136 vidc->pll_ctl = acornfb_vidc20_find_pll(var->pixclock / div); in acornfb_vidc20_find_rates()
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/arch/arm/boot/dts/ |
D | omap4-var-stk-om44.dts | 10 #include "omap4-var-som-om44.dtsi" 11 #include "omap4-var-som-om44-wlan.dtsi" 12 #include "omap4-var-om44customboard.dtsi" 16 compatible = "variscite,var-stk-om44", "variscite,var-som-om44", "ti,omap4460", "ti,omap4";
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D | omap4-var-dvk-om44.dts | 10 #include "omap4-var-som-om44.dtsi" 11 #include "omap4-var-som-om44-wlan.dtsi" 12 #include "omap4-var-om44customboard.dtsi" 16 compatible = "variscite,var-dvk-om44", "variscite,var-som-om44", "ti,omap4460", "ti,omap4";
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/arch/x86/um/asm/ |
D | barrier.h | 46 #define set_mb(var, value) do { (void)xchg(&var, value); } while (0) argument 54 #define set_mb(var, value) do { var = value; barrier(); } while (0) argument
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/arch/mips/bcm47xx/ |
D | nvram.c | 163 char *var, *value, *end, *eq; in bcm47xx_nvram_getenv() local 176 var = &nvram_buf[sizeof(struct nvram_header)]; in bcm47xx_nvram_getenv() 179 for (; *var; var = value + strlen(value) + 1) { in bcm47xx_nvram_getenv() 180 eq = strchr(var, '='); in bcm47xx_nvram_getenv() 184 if ((eq - var) == strlen(name) && in bcm47xx_nvram_getenv() 185 strncmp(var, name, (eq - var)) == 0) { in bcm47xx_nvram_getenv()
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/arch/arm/mach-netx/ |
D | nxeb500hmi.c | 61 static inline int nxeb500hmi_check(struct clcd_fb *fb, struct fb_var_screeninfo *var) in nxeb500hmi_check() argument 63 var->green.length = 5; in nxeb500hmi_check() 64 var->green.msb_right = 0; in nxeb500hmi_check() 66 return clcdfb_check(fb, var); in nxeb500hmi_check() 73 fb->fb.var.green.length = 5; in nxeb500hmi_clcd_setup() 74 fb->fb.var.green.msb_right = 0; in nxeb500hmi_clcd_setup()
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D | nxdb500.c | 61 static inline int nxdb500_check(struct clcd_fb *fb, struct fb_var_screeninfo *var) in nxdb500_check() argument 63 var->green.length = 5; in nxdb500_check() 64 var->green.msb_right = 0; in nxdb500_check() 66 return clcdfb_check(fb, var); in nxdb500_check() 73 fb->fb.var.green.length = 5; in nxdb500_clcd_setup() 74 fb->fb.var.green.msb_right = 0; in nxdb500_clcd_setup()
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/arch/microblaze/include/asm/ |
D | entry.h | 25 #define PER_CPU(var) var argument
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/arch/sh/include/asm/ |
D | barrier.h | 35 #define set_mb(var, value) do { (void)xchg(&var, value); } while (0) argument
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/arch/arm/mach-integrator/ |
D | integrator_cp.c | 182 struct fb_var_screeninfo *var = &fb->fb.var; in cp_clcd_enable() local 186 if (var->bits_per_pixel <= 8 || in cp_clcd_enable() 187 (var->bits_per_pixel == 16 && var->green.length == 5)) in cp_clcd_enable() 190 else if (fb->fb.var.bits_per_pixel <= 16) in cp_clcd_enable()
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/arch/s390/include/asm/ |
D | barrier.h | 36 #define set_mb(var, value) do { var = value; mb(); } while (0) argument
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/arch/powerpc/include/asm/ |
D | barrier.h | 38 #define set_mb(var, value) do { var = value; mb(); } while (0) argument
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/arch/metag/include/asm/ |
D | barrier.h | 86 #define set_mb(var, value) do { var = value; smp_mb(); } while (0) argument
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/arch/arm64/include/asm/ |
D | barrier.h | 86 #define set_mb(var, value) do { var = value; smp_mb(); } while (0) argument
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/arch/mips/include/asm/ |
D | barrier.h | 166 #define set_mb(var, value) \ argument 167 do { var = value; smp_mb(); } while (0)
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/arch/tile/include/hv/ |
D | drv_xgbe_intf.h | 489 #define LEPP_QINC(var) \ argument 490 (var = __insn_mnz(var - (LEPP_COMP_QUEUE_SIZE - 1), var + 1))
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/arch/arm/include/asm/ |
D | barrier.h | 80 #define set_mb(var, value) do { var = value; smp_mb(); } while (0) argument
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/arch/arc/plat-arcfpga/ |
D | smp.c | 122 #define IS_AVAIL1(var, str) ((var) ? str : "") in iss_model_init_early_smp() argument
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/arch/mips/pmcs-msp71xx/ |
D | msp_prom.c | 293 char **var = prom_envp; in prom_getenv() local 296 while (*var) { in prom_getenv() 297 if (strncmp(env_name, *var, i) == 0) { in prom_getenv() 298 return (*var + strlen(env_name) + 1); in prom_getenv() 300 var++; in prom_getenv()
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