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Searched refs:virtual (Results 1 – 25 of 230) sorted by relevance

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/arch/arm/mach-gemini/
Dmm.c22 .virtual = (unsigned long)IO_ADDRESS(GEMINI_GLOBAL_BASE),
27 .virtual = (unsigned long)IO_ADDRESS(GEMINI_UART_BASE),
32 .virtual = (unsigned long)IO_ADDRESS(GEMINI_TIMER_BASE),
37 .virtual = (unsigned long)IO_ADDRESS(GEMINI_INTERRUPT_BASE),
42 .virtual = (unsigned long)IO_ADDRESS(GEMINI_POWER_CTRL_BASE),
47 .virtual = (unsigned long)IO_ADDRESS(GEMINI_GPIO_BASE(0)),
52 .virtual = (unsigned long)IO_ADDRESS(GEMINI_GPIO_BASE(1)),
57 .virtual = (unsigned long)IO_ADDRESS(GEMINI_GPIO_BASE(2)),
62 .virtual = (unsigned long)IO_ADDRESS(GEMINI_FLASH_CTRL_BASE),
67 .virtual = (unsigned long)IO_ADDRESS(GEMINI_DRAM_CTRL_BASE),
[all …]
/arch/arm/mach-exynos/
Dexynos.c39 .virtual = (unsigned long)S3C_VA_SYS,
44 .virtual = (unsigned long)S3C_VA_TIMER,
49 .virtual = (unsigned long)S3C_VA_WATCHDOG,
54 .virtual = (unsigned long)S5P_VA_SROMC,
59 .virtual = (unsigned long)S5P_VA_SYSTIMER,
64 .virtual = (unsigned long)S5P_VA_COMBINER_BASE,
69 .virtual = (unsigned long)S5P_VA_GIC_CPU,
74 .virtual = (unsigned long)S5P_VA_GIC_DIST,
79 .virtual = (unsigned long)S5P_VA_CMU,
84 .virtual = (unsigned long)S5P_VA_COREPERI_BASE,
[all …]
/arch/arm/mach-omap2/
Dio.c72 .virtual = L3_24XX_VIRT,
78 .virtual = L4_24XX_VIRT,
88 .virtual = DSP_MEM_2420_VIRT,
94 .virtual = DSP_IPI_2420_VIRT,
100 .virtual = DSP_MMU_2420_VIRT,
112 .virtual = L4_WK_243X_VIRT,
118 .virtual = OMAP243X_GPMC_VIRT,
124 .virtual = OMAP243X_SDRC_VIRT,
130 .virtual = OMAP243X_SMS_VIRT,
142 .virtual = L3_34XX_VIRT,
[all …]
/arch/arm/mach-tegra/
Dio.c35 .virtual = (unsigned long)IO_PPSB_VIRT,
41 .virtual = (unsigned long)IO_APB_VIRT,
47 .virtual = (unsigned long)IO_CPU_VIRT,
53 .virtual = (unsigned long)IO_IRAM_VIRT,
/arch/arm/mach-omap1/
Dio.c33 .virtual = OMAP1_IO_VIRT,
43 .virtual = OMAP7XX_DSP_BASE,
48 .virtual = OMAP7XX_DSPREG_BASE,
59 .virtual = OMAP1510_DSP_BASE,
64 .virtual = OMAP1510_DSPREG_BASE,
75 .virtual = OMAP16XX_DSP_BASE,
80 .virtual = OMAP16XX_DSPREG_BASE,
/arch/arm/mach-at91/
Dsama5d4.c30 .virtual = (unsigned long)AT91_ALT_IO_P2V(SAMA5D4_BASE_MPDDRC),
36 .virtual = (unsigned long)AT91_ALT_IO_P2V(SAMA5D4_BASE_PMC),
42 .virtual = (unsigned long)AT91_ALT_IO_P2V(SAMA5D4_BASE_USART3),
48 .virtual = (unsigned long)AT91_ALT_IO_P2V(SAMA5D4_BASE_SYS2),
/arch/arm/mach-spear/
Dspear13xx.c62 .virtual = (unsigned long)VA_PERIP_GRP2_BASE,
67 .virtual = (unsigned long)VA_PERIP_GRP1_BASE,
72 .virtual = (unsigned long)VA_A9SM_AND_MPMC_BASE,
77 .virtual = (unsigned long)VA_L2CC_BASE,
/arch/arm/mach-cns3xxx/
Dcore.c31 .virtual = CNS3XXX_TC11MP_SCU_BASE_VIRT,
36 .virtual = CNS3XXX_TIMER1_2_3_BASE_VIRT,
41 .virtual = CNS3XXX_MISC_BASE_VIRT,
46 .virtual = CNS3XXX_PM_BASE_VIRT,
52 .virtual = CNS3XXX_PCIE0_HOST_BASE_VIRT,
57 .virtual = CNS3XXX_PCIE0_CFG0_BASE_VIRT,
62 .virtual = CNS3XXX_PCIE0_CFG1_BASE_VIRT,
67 .virtual = CNS3XXX_PCIE1_HOST_BASE_VIRT,
72 .virtual = CNS3XXX_PCIE1_CFG0_BASE_VIRT,
77 .virtual = CNS3XXX_PCIE1_CFG1_BASE_VIRT,
/arch/arm/mach-realview/
Drealview_pbx.c52 .virtual = IO_ADDRESS(REALVIEW_SYS_BASE),
57 .virtual = IO_ADDRESS(REALVIEW_PBX_GIC_CPU_BASE),
62 .virtual = IO_ADDRESS(REALVIEW_PBX_GIC_DIST_BASE),
67 .virtual = IO_ADDRESS(REALVIEW_SCTL_BASE),
72 .virtual = IO_ADDRESS(REALVIEW_PBX_TIMER0_1_BASE),
77 .virtual = IO_ADDRESS(REALVIEW_PBX_TIMER2_3_BASE),
84 .virtual = PCIX_UNIT_BASE,
92 .virtual = IO_ADDRESS(REALVIEW_PBX_UART0_BASE),
102 .virtual = IO_ADDRESS(REALVIEW_PBX_TILE_SCU_BASE),
107 .virtual = IO_ADDRESS(REALVIEW_PBX_TILE_GIC_DIST_BASE),
[all …]
Drealview_pb1176.c55 .virtual = IO_ADDRESS(REALVIEW_SYS_BASE),
60 .virtual = IO_ADDRESS(REALVIEW_PB1176_GIC_CPU_BASE),
65 .virtual = IO_ADDRESS(REALVIEW_PB1176_GIC_DIST_BASE),
70 .virtual = IO_ADDRESS(REALVIEW_DC1176_GIC_CPU_BASE),
75 .virtual = IO_ADDRESS(REALVIEW_DC1176_GIC_DIST_BASE),
80 .virtual = IO_ADDRESS(REALVIEW_SCTL_BASE),
85 .virtual = IO_ADDRESS(REALVIEW_PB1176_TIMER0_1_BASE),
90 .virtual = IO_ADDRESS(REALVIEW_PB1176_TIMER2_3_BASE),
95 .virtual = IO_ADDRESS(REALVIEW_PB1176_L220_BASE),
102 .virtual = IO_ADDRESS(REALVIEW_PB1176_UART0_BASE),
Drealview_pba8.c50 .virtual = IO_ADDRESS(REALVIEW_SYS_BASE),
55 .virtual = IO_ADDRESS(REALVIEW_PBA8_GIC_CPU_BASE),
60 .virtual = IO_ADDRESS(REALVIEW_PBA8_GIC_DIST_BASE),
65 .virtual = IO_ADDRESS(REALVIEW_SCTL_BASE),
70 .virtual = IO_ADDRESS(REALVIEW_PBA8_TIMER0_1_BASE),
75 .virtual = IO_ADDRESS(REALVIEW_PBA8_TIMER2_3_BASE),
82 .virtual = PCIX_UNIT_BASE,
90 .virtual = IO_ADDRESS(REALVIEW_PBA8_UART0_BASE),
Drealview_pb11mp.c53 .virtual = IO_ADDRESS(REALVIEW_SYS_BASE),
58 .virtual = IO_ADDRESS(REALVIEW_PB11MP_GIC_CPU_BASE),
63 .virtual = IO_ADDRESS(REALVIEW_PB11MP_GIC_DIST_BASE),
68 .virtual = IO_ADDRESS(REALVIEW_TC11MP_PRIV_MEM_BASE),
73 .virtual = IO_ADDRESS(REALVIEW_SCTL_BASE),
78 .virtual = IO_ADDRESS(REALVIEW_PB11MP_TIMER0_1_BASE),
83 .virtual = IO_ADDRESS(REALVIEW_PB11MP_TIMER2_3_BASE),
88 .virtual = IO_ADDRESS(REALVIEW_TC11MP_L220_BASE),
95 .virtual = IO_ADDRESS(REALVIEW_PB11MP_UART0_BASE),
/arch/arm/mach-s3c24xx/
Dmach-smdk2443.c52 .virtual = (u32)S3C24XX_VA_ISA_WORD,
57 .virtual = (u32)S3C24XX_VA_ISA_WORD + 0x10000,
62 .virtual = (u32)S3C24XX_VA_ISA_BYTE,
67 .virtual = (u32)S3C24XX_VA_ISA_BYTE + 0x10000,
Dmach-smdk2440.c52 .virtual = (u32)S3C24XX_VA_ISA_WORD,
57 .virtual = (u32)S3C24XX_VA_ISA_WORD + 0x10000,
62 .virtual = (u32)S3C24XX_VA_ISA_BYTE,
67 .virtual = (u32)S3C24XX_VA_ISA_BYTE + 0x10000,
Dmach-vr1000.c71 .virtual = (u32)S3C24XX_VA_ISA_BYTE,
76 .virtual = (u32)S3C24XX_VA_ISA_WORD,
84 .virtual = (u32)VR1000_VA_CTRL1,
89 .virtual = (u32)VR1000_VA_CTRL2,
94 .virtual = (u32)VR1000_VA_CTRL3,
99 .virtual = (u32)VR1000_VA_CTRL4,
/arch/unicore32/mm/
Dmmu.c80 unsigned long virtual; member
214 if (md->virtual != vectors_base() && md->virtual < TASK_SIZE) { in create_mapping()
217 __pfn_to_phys((u64)md->pfn), md->virtual); in create_mapping()
222 md->virtual >= PAGE_OFFSET && md->virtual < VMALLOC_END) { in create_mapping()
225 __pfn_to_phys((u64)md->pfn), md->virtual); in create_mapping()
230 addr = md->virtual & PAGE_MASK; in create_mapping()
232 length = PAGE_ALIGN(md->length + (md->virtual & ~PAGE_MASK)); in create_mapping()
369 map.virtual = VECTORS_BASE; in devicemaps_init()
379 map.virtual = KUSER_VECPAGE_BASE; in devicemaps_init()
410 map.virtual = __phys_to_virt(start); in map_lowmem()
/arch/arm/mach-s3c64xx/
Dcommon.c108 .virtual = (unsigned long)S3C_VA_SYS,
113 .virtual = (unsigned long)S3C_VA_MEM,
118 .virtual = (unsigned long)(S3C_VA_UART + UART_OFFS),
123 .virtual = (unsigned long)VA_VIC0,
128 .virtual = (unsigned long)VA_VIC1,
133 .virtual = (unsigned long)S3C_VA_TIMER,
138 .virtual = (unsigned long)S3C64XX_VA_GPIO,
143 .virtual = (unsigned long)S3C64XX_VA_MODEM,
148 .virtual = (unsigned long)S3C_VA_WATCHDOG,
153 .virtual = (unsigned long)S3C_VA_USB_HSPHY,
/arch/arm/mach-integrator/
Dintegrator_cp.c69 .virtual = IO_ADDRESS(INTEGRATOR_HDR_BASE),
74 .virtual = IO_ADDRESS(INTEGRATOR_CT_BASE),
79 .virtual = IO_ADDRESS(INTEGRATOR_IC_BASE),
84 .virtual = IO_ADDRESS(INTEGRATOR_UART0_BASE),
89 .virtual = IO_ADDRESS(INTEGRATOR_DBG_BASE),
94 .virtual = IO_ADDRESS(INTEGRATOR_CP_GPIO_BASE),
99 .virtual = IO_ADDRESS(INTEGRATOR_CP_SIC_BASE),
/arch/arm/mach-ebsa110/
Dcore.c77 .virtual = (unsigned long)IRQ_STAT,
82 .virtual = (unsigned long)IRQ_MASK,
87 .virtual = (unsigned long)SOFT_BASE,
92 .virtual = (unsigned long)PIT_BASE,
102 .virtual = ISAIO_BASE,
107 .virtual = ISAMEM_BASE,
/arch/arm/mach-msm/
Dio.c34 .virtual = (unsigned long) MSM_##name##_BASE, \
55 .virtual = (unsigned long) MSM_SHARED_RAM_BASE,
81 &msm_io_desc[size - 1].virtual); in msm_map_common_io()
102 .virtual = (unsigned long) MSM_SHARED_RAM_BASE,
132 .virtual = (unsigned long) MSM_SHARED_RAM_BASE,
/arch/arm/mach-footbridge/
Dcommon.c142 .virtual = ARMCSR_BASE,
156 .virtual = PCIMEM_BASE,
161 .virtual = PCICFG0_BASE,
166 .virtual = PCICFG1_BASE,
171 .virtual = PCIIACK_BASE,
/arch/arm/mach-sa1100/
Dnanoengine.c69 .virtual = 0xf0000000,
75 .virtual = NANO_PCI_MEM_RW_VIRT,
81 .virtual = NANO_PCI_CONFIG_SPACE_VIRT,
/arch/arm64/kvm/
DKconfig11 other operating systems inside virtual machines (guests).
40 int "Number maximum supported virtual CPUs per VM"
44 Static number of max supported virtual CPUs per VM.
61 Adds support for the Architected Timers in virtual machines.
/arch/arm/mach-mmp/
Dcommon.c31 .virtual = (unsigned long)APB_VIRT_BASE,
36 .virtual = (unsigned long)AXI_VIRT_BASE,
/arch/arm/mach-ux500/
Dsetup.h30 .virtual = IO_ADDRESS(x), \
37 .virtual = IO_ADDRESS(x), \

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