1 /****************************************************************************** 2 * 3 * This file is provided under a dual BSD/GPLv2 license. When using or 4 * redistributing this file, you may do so under either license. 5 * 6 * GPL LICENSE SUMMARY 7 * 8 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. 9 * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH 10 * 11 * This program is free software; you can redistribute it and/or modify 12 * it under the terms of version 2 of the GNU General Public License as 13 * published by the Free Software Foundation. 14 * 15 * This program is distributed in the hope that it will be useful, but 16 * WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 18 * General Public License for more details. 19 * 20 * You should have received a copy of the GNU General Public License 21 * along with this program; if not, write to the Free Software 22 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110, 23 * USA 24 * 25 * The full GNU General Public License is included in this distribution 26 * in the file called COPYING. 27 * 28 * Contact Information: 29 * Intel Linux Wireless <ilw@linux.intel.com> 30 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 31 * 32 * BSD LICENSE 33 * 34 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. 35 * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH 36 * All rights reserved. 37 * 38 * Redistribution and use in source and binary forms, with or without 39 * modification, are permitted provided that the following conditions 40 * are met: 41 * 42 * * Redistributions of source code must retain the above copyright 43 * notice, this list of conditions and the following disclaimer. 44 * * Redistributions in binary form must reproduce the above copyright 45 * notice, this list of conditions and the following disclaimer in 46 * the documentation and/or other materials provided with the 47 * distribution. 48 * * Neither the name Intel Corporation nor the names of its 49 * contributors may be used to endorse or promote products derived 50 * from this software without specific prior written permission. 51 * 52 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 53 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 54 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 55 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 56 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 57 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 58 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 59 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 60 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 61 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 62 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 63 * 64 *****************************************************************************/ 65 66 #ifndef __fw_api_h__ 67 #define __fw_api_h__ 68 69 #include "fw-api-rs.h" 70 #include "fw-api-tx.h" 71 #include "fw-api-sta.h" 72 #include "fw-api-mac.h" 73 #include "fw-api-power.h" 74 #include "fw-api-d3.h" 75 #include "fw-api-coex.h" 76 #include "fw-api-scan.h" 77 78 /* Tx queue numbers */ 79 enum { 80 IWL_MVM_OFFCHANNEL_QUEUE = 8, 81 IWL_MVM_CMD_QUEUE = 9, 82 }; 83 84 enum iwl_mvm_tx_fifo { 85 IWL_MVM_TX_FIFO_BK = 0, 86 IWL_MVM_TX_FIFO_BE, 87 IWL_MVM_TX_FIFO_VI, 88 IWL_MVM_TX_FIFO_VO, 89 IWL_MVM_TX_FIFO_MCAST = 5, 90 IWL_MVM_TX_FIFO_CMD = 7, 91 }; 92 93 #define IWL_MVM_STATION_COUNT 16 94 95 #define IWL_MVM_TDLS_STA_COUNT 4 96 97 /* commands */ 98 enum { 99 MVM_ALIVE = 0x1, 100 REPLY_ERROR = 0x2, 101 102 INIT_COMPLETE_NOTIF = 0x4, 103 104 /* PHY context commands */ 105 PHY_CONTEXT_CMD = 0x8, 106 DBG_CFG = 0x9, 107 ANTENNA_COUPLING_NOTIFICATION = 0xa, 108 109 /* station table */ 110 ADD_STA_KEY = 0x17, 111 ADD_STA = 0x18, 112 REMOVE_STA = 0x19, 113 114 /* TX */ 115 TX_CMD = 0x1c, 116 TXPATH_FLUSH = 0x1e, 117 MGMT_MCAST_KEY = 0x1f, 118 119 /* scheduler config */ 120 SCD_QUEUE_CFG = 0x1d, 121 122 /* global key */ 123 WEP_KEY = 0x20, 124 125 /* MAC and Binding commands */ 126 MAC_CONTEXT_CMD = 0x28, 127 TIME_EVENT_CMD = 0x29, /* both CMD and response */ 128 TIME_EVENT_NOTIFICATION = 0x2a, 129 BINDING_CONTEXT_CMD = 0x2b, 130 TIME_QUOTA_CMD = 0x2c, 131 NON_QOS_TX_COUNTER_CMD = 0x2d, 132 133 LQ_CMD = 0x4e, 134 135 /* Calibration */ 136 TEMPERATURE_NOTIFICATION = 0x62, 137 CALIBRATION_CFG_CMD = 0x65, 138 CALIBRATION_RES_NOTIFICATION = 0x66, 139 CALIBRATION_COMPLETE_NOTIFICATION = 0x67, 140 RADIO_VERSION_NOTIFICATION = 0x68, 141 142 /* Scan offload */ 143 SCAN_OFFLOAD_REQUEST_CMD = 0x51, 144 SCAN_OFFLOAD_ABORT_CMD = 0x52, 145 HOT_SPOT_CMD = 0x53, 146 SCAN_OFFLOAD_COMPLETE = 0x6D, 147 SCAN_OFFLOAD_UPDATE_PROFILES_CMD = 0x6E, 148 SCAN_OFFLOAD_CONFIG_CMD = 0x6f, 149 MATCH_FOUND_NOTIFICATION = 0xd9, 150 SCAN_ITERATION_COMPLETE = 0xe7, 151 152 /* Phy */ 153 PHY_CONFIGURATION_CMD = 0x6a, 154 CALIB_RES_NOTIF_PHY_DB = 0x6b, 155 /* PHY_DB_CMD = 0x6c, */ 156 157 /* Power - legacy power table command */ 158 POWER_TABLE_CMD = 0x77, 159 PSM_UAPSD_AP_MISBEHAVING_NOTIFICATION = 0x78, 160 LTR_CONFIG = 0xee, 161 162 /* Thermal Throttling*/ 163 REPLY_THERMAL_MNG_BACKOFF = 0x7e, 164 165 /* Scanning */ 166 SCAN_REQUEST_CMD = 0x80, 167 SCAN_ABORT_CMD = 0x81, 168 SCAN_START_NOTIFICATION = 0x82, 169 SCAN_RESULTS_NOTIFICATION = 0x83, 170 SCAN_COMPLETE_NOTIFICATION = 0x84, 171 172 /* NVM */ 173 NVM_ACCESS_CMD = 0x88, 174 175 SET_CALIB_DEFAULT_CMD = 0x8e, 176 177 BEACON_NOTIFICATION = 0x90, 178 BEACON_TEMPLATE_CMD = 0x91, 179 TX_ANT_CONFIGURATION_CMD = 0x98, 180 STATISTICS_NOTIFICATION = 0x9d, 181 EOSP_NOTIFICATION = 0x9e, 182 REDUCE_TX_POWER_CMD = 0x9f, 183 184 /* RF-KILL commands and notifications */ 185 CARD_STATE_CMD = 0xa0, 186 CARD_STATE_NOTIFICATION = 0xa1, 187 188 MISSED_BEACONS_NOTIFICATION = 0xa2, 189 190 /* Power - new power table command */ 191 MAC_PM_POWER_TABLE = 0xa9, 192 193 REPLY_RX_PHY_CMD = 0xc0, 194 REPLY_RX_MPDU_CMD = 0xc1, 195 BA_NOTIF = 0xc5, 196 197 MARKER_CMD = 0xcb, 198 199 /* BT Coex */ 200 BT_COEX_PRIO_TABLE = 0xcc, 201 BT_COEX_PROT_ENV = 0xcd, 202 BT_PROFILE_NOTIFICATION = 0xce, 203 BT_CONFIG = 0x9b, 204 BT_COEX_UPDATE_SW_BOOST = 0x5a, 205 BT_COEX_UPDATE_CORUN_LUT = 0x5b, 206 BT_COEX_UPDATE_REDUCED_TXP = 0x5c, 207 BT_COEX_CI = 0x5d, 208 209 REPLY_SF_CFG_CMD = 0xd1, 210 REPLY_BEACON_FILTERING_CMD = 0xd2, 211 212 /* DTS measurements */ 213 CMD_DTS_MEASUREMENT_TRIGGER = 0xdc, 214 DTS_MEASUREMENT_NOTIFICATION = 0xdd, 215 216 REPLY_DEBUG_CMD = 0xf0, 217 DEBUG_LOG_MSG = 0xf7, 218 219 BCAST_FILTER_CMD = 0xcf, 220 MCAST_FILTER_CMD = 0xd0, 221 222 /* D3 commands/notifications */ 223 D3_CONFIG_CMD = 0xd3, 224 PROT_OFFLOAD_CONFIG_CMD = 0xd4, 225 OFFLOADS_QUERY_CMD = 0xd5, 226 REMOTE_WAKE_CONFIG_CMD = 0xd6, 227 D0I3_END_CMD = 0xed, 228 229 /* for WoWLAN in particular */ 230 WOWLAN_PATTERNS = 0xe0, 231 WOWLAN_CONFIGURATION = 0xe1, 232 WOWLAN_TSC_RSC_PARAM = 0xe2, 233 WOWLAN_TKIP_PARAM = 0xe3, 234 WOWLAN_KEK_KCK_MATERIAL = 0xe4, 235 WOWLAN_GET_STATUSES = 0xe5, 236 WOWLAN_TX_POWER_PER_DB = 0xe6, 237 238 /* and for NetDetect */ 239 NET_DETECT_CONFIG_CMD = 0x54, 240 NET_DETECT_PROFILES_QUERY_CMD = 0x56, 241 NET_DETECT_PROFILES_CMD = 0x57, 242 NET_DETECT_HOTSPOTS_CMD = 0x58, 243 NET_DETECT_HOTSPOTS_QUERY_CMD = 0x59, 244 245 REPLY_MAX = 0xff, 246 }; 247 248 /** 249 * struct iwl_cmd_response - generic response struct for most commands 250 * @status: status of the command asked, changes for each one 251 */ 252 struct iwl_cmd_response { 253 __le32 status; 254 }; 255 256 /* 257 * struct iwl_tx_ant_cfg_cmd 258 * @valid: valid antenna configuration 259 */ 260 struct iwl_tx_ant_cfg_cmd { 261 __le32 valid; 262 } __packed; 263 264 /** 265 * struct iwl_reduce_tx_power_cmd - TX power reduction command 266 * REDUCE_TX_POWER_CMD = 0x9f 267 * @flags: (reserved for future implementation) 268 * @mac_context_id: id of the mac ctx for which we are reducing TX power. 269 * @pwr_restriction: TX power restriction in dBms. 270 */ 271 struct iwl_reduce_tx_power_cmd { 272 u8 flags; 273 u8 mac_context_id; 274 __le16 pwr_restriction; 275 } __packed; /* TX_REDUCED_POWER_API_S_VER_1 */ 276 277 /* 278 * Calibration control struct. 279 * Sent as part of the phy configuration command. 280 * @flow_trigger: bitmap for which calibrations to perform according to 281 * flow triggers. 282 * @event_trigger: bitmap for which calibrations to perform according to 283 * event triggers. 284 */ 285 struct iwl_calib_ctrl { 286 __le32 flow_trigger; 287 __le32 event_trigger; 288 } __packed; 289 290 /* This enum defines the bitmap of various calibrations to enable in both 291 * init ucode and runtime ucode through CALIBRATION_CFG_CMD. 292 */ 293 enum iwl_calib_cfg { 294 IWL_CALIB_CFG_XTAL_IDX = BIT(0), 295 IWL_CALIB_CFG_TEMPERATURE_IDX = BIT(1), 296 IWL_CALIB_CFG_VOLTAGE_READ_IDX = BIT(2), 297 IWL_CALIB_CFG_PAPD_IDX = BIT(3), 298 IWL_CALIB_CFG_TX_PWR_IDX = BIT(4), 299 IWL_CALIB_CFG_DC_IDX = BIT(5), 300 IWL_CALIB_CFG_BB_FILTER_IDX = BIT(6), 301 IWL_CALIB_CFG_LO_LEAKAGE_IDX = BIT(7), 302 IWL_CALIB_CFG_TX_IQ_IDX = BIT(8), 303 IWL_CALIB_CFG_TX_IQ_SKEW_IDX = BIT(9), 304 IWL_CALIB_CFG_RX_IQ_IDX = BIT(10), 305 IWL_CALIB_CFG_RX_IQ_SKEW_IDX = BIT(11), 306 IWL_CALIB_CFG_SENSITIVITY_IDX = BIT(12), 307 IWL_CALIB_CFG_CHAIN_NOISE_IDX = BIT(13), 308 IWL_CALIB_CFG_DISCONNECTED_ANT_IDX = BIT(14), 309 IWL_CALIB_CFG_ANT_COUPLING_IDX = BIT(15), 310 IWL_CALIB_CFG_DAC_IDX = BIT(16), 311 IWL_CALIB_CFG_ABS_IDX = BIT(17), 312 IWL_CALIB_CFG_AGC_IDX = BIT(18), 313 }; 314 315 /* 316 * Phy configuration command. 317 */ 318 struct iwl_phy_cfg_cmd { 319 __le32 phy_cfg; 320 struct iwl_calib_ctrl calib_control; 321 } __packed; 322 323 #define PHY_CFG_RADIO_TYPE (BIT(0) | BIT(1)) 324 #define PHY_CFG_RADIO_STEP (BIT(2) | BIT(3)) 325 #define PHY_CFG_RADIO_DASH (BIT(4) | BIT(5)) 326 #define PHY_CFG_PRODUCT_NUMBER (BIT(6) | BIT(7)) 327 #define PHY_CFG_TX_CHAIN_A BIT(8) 328 #define PHY_CFG_TX_CHAIN_B BIT(9) 329 #define PHY_CFG_TX_CHAIN_C BIT(10) 330 #define PHY_CFG_RX_CHAIN_A BIT(12) 331 #define PHY_CFG_RX_CHAIN_B BIT(13) 332 #define PHY_CFG_RX_CHAIN_C BIT(14) 333 334 335 /* Target of the NVM_ACCESS_CMD */ 336 enum { 337 NVM_ACCESS_TARGET_CACHE = 0, 338 NVM_ACCESS_TARGET_OTP = 1, 339 NVM_ACCESS_TARGET_EEPROM = 2, 340 }; 341 342 /* Section types for NVM_ACCESS_CMD */ 343 enum { 344 NVM_SECTION_TYPE_SW = 1, 345 NVM_SECTION_TYPE_REGULATORY = 3, 346 NVM_SECTION_TYPE_CALIBRATION = 4, 347 NVM_SECTION_TYPE_PRODUCTION = 5, 348 NVM_SECTION_TYPE_MAC_OVERRIDE = 11, 349 NVM_MAX_NUM_SECTIONS = 12, 350 }; 351 352 /** 353 * struct iwl_nvm_access_cmd_ver2 - Request the device to send an NVM section 354 * @op_code: 0 - read, 1 - write 355 * @target: NVM_ACCESS_TARGET_* 356 * @type: NVM_SECTION_TYPE_* 357 * @offset: offset in bytes into the section 358 * @length: in bytes, to read/write 359 * @data: if write operation, the data to write. On read its empty 360 */ 361 struct iwl_nvm_access_cmd { 362 u8 op_code; 363 u8 target; 364 __le16 type; 365 __le16 offset; 366 __le16 length; 367 u8 data[]; 368 } __packed; /* NVM_ACCESS_CMD_API_S_VER_2 */ 369 370 /** 371 * struct iwl_nvm_access_resp_ver2 - response to NVM_ACCESS_CMD 372 * @offset: offset in bytes into the section 373 * @length: in bytes, either how much was written or read 374 * @type: NVM_SECTION_TYPE_* 375 * @status: 0 for success, fail otherwise 376 * @data: if read operation, the data returned. Empty on write. 377 */ 378 struct iwl_nvm_access_resp { 379 __le16 offset; 380 __le16 length; 381 __le16 type; 382 __le16 status; 383 u8 data[]; 384 } __packed; /* NVM_ACCESS_CMD_RESP_API_S_VER_2 */ 385 386 /* MVM_ALIVE 0x1 */ 387 388 /* alive response is_valid values */ 389 #define ALIVE_RESP_UCODE_OK BIT(0) 390 #define ALIVE_RESP_RFKILL BIT(1) 391 392 /* alive response ver_type values */ 393 enum { 394 FW_TYPE_HW = 0, 395 FW_TYPE_PROT = 1, 396 FW_TYPE_AP = 2, 397 FW_TYPE_WOWLAN = 3, 398 FW_TYPE_TIMING = 4, 399 FW_TYPE_WIPAN = 5 400 }; 401 402 /* alive response ver_subtype values */ 403 enum { 404 FW_SUBTYPE_FULL_FEATURE = 0, 405 FW_SUBTYPE_BOOTSRAP = 1, /* Not valid */ 406 FW_SUBTYPE_REDUCED = 2, 407 FW_SUBTYPE_ALIVE_ONLY = 3, 408 FW_SUBTYPE_WOWLAN = 4, 409 FW_SUBTYPE_AP_SUBTYPE = 5, 410 FW_SUBTYPE_WIPAN = 6, 411 FW_SUBTYPE_INITIALIZE = 9 412 }; 413 414 #define IWL_ALIVE_STATUS_ERR 0xDEAD 415 #define IWL_ALIVE_STATUS_OK 0xCAFE 416 417 #define IWL_ALIVE_FLG_RFKILL BIT(0) 418 419 struct mvm_alive_resp { 420 __le16 status; 421 __le16 flags; 422 u8 ucode_minor; 423 u8 ucode_major; 424 __le16 id; 425 u8 api_minor; 426 u8 api_major; 427 u8 ver_subtype; 428 u8 ver_type; 429 u8 mac; 430 u8 opt; 431 __le16 reserved2; 432 __le32 timestamp; 433 __le32 error_event_table_ptr; /* SRAM address for error log */ 434 __le32 log_event_table_ptr; /* SRAM address for event log */ 435 __le32 cpu_register_ptr; 436 __le32 dbgm_config_ptr; 437 __le32 alive_counter_ptr; 438 __le32 scd_base_ptr; /* SRAM address for SCD */ 439 } __packed; /* ALIVE_RES_API_S_VER_1 */ 440 441 struct mvm_alive_resp_ver2 { 442 __le16 status; 443 __le16 flags; 444 u8 ucode_minor; 445 u8 ucode_major; 446 __le16 id; 447 u8 api_minor; 448 u8 api_major; 449 u8 ver_subtype; 450 u8 ver_type; 451 u8 mac; 452 u8 opt; 453 __le16 reserved2; 454 __le32 timestamp; 455 __le32 error_event_table_ptr; /* SRAM address for error log */ 456 __le32 log_event_table_ptr; /* SRAM address for LMAC event log */ 457 __le32 cpu_register_ptr; 458 __le32 dbgm_config_ptr; 459 __le32 alive_counter_ptr; 460 __le32 scd_base_ptr; /* SRAM address for SCD */ 461 __le32 st_fwrd_addr; /* pointer to Store and forward */ 462 __le32 st_fwrd_size; 463 u8 umac_minor; /* UMAC version: minor */ 464 u8 umac_major; /* UMAC version: major */ 465 __le16 umac_id; /* UMAC version: id */ 466 __le32 error_info_addr; /* SRAM address for UMAC error log */ 467 __le32 dbg_print_buff_addr; 468 } __packed; /* ALIVE_RES_API_S_VER_2 */ 469 470 /* Error response/notification */ 471 enum { 472 FW_ERR_UNKNOWN_CMD = 0x0, 473 FW_ERR_INVALID_CMD_PARAM = 0x1, 474 FW_ERR_SERVICE = 0x2, 475 FW_ERR_ARC_MEMORY = 0x3, 476 FW_ERR_ARC_CODE = 0x4, 477 FW_ERR_WATCH_DOG = 0x5, 478 FW_ERR_WEP_GRP_KEY_INDX = 0x10, 479 FW_ERR_WEP_KEY_SIZE = 0x11, 480 FW_ERR_OBSOLETE_FUNC = 0x12, 481 FW_ERR_UNEXPECTED = 0xFE, 482 FW_ERR_FATAL = 0xFF 483 }; 484 485 /** 486 * struct iwl_error_resp - FW error indication 487 * ( REPLY_ERROR = 0x2 ) 488 * @error_type: one of FW_ERR_* 489 * @cmd_id: the command ID for which the error occured 490 * @bad_cmd_seq_num: sequence number of the erroneous command 491 * @error_service: which service created the error, applicable only if 492 * error_type = 2, otherwise 0 493 * @timestamp: TSF in usecs. 494 */ 495 struct iwl_error_resp { 496 __le32 error_type; 497 u8 cmd_id; 498 u8 reserved1; 499 __le16 bad_cmd_seq_num; 500 __le32 error_service; 501 __le64 timestamp; 502 } __packed; 503 504 505 /* Common PHY, MAC and Bindings definitions */ 506 507 #define MAX_MACS_IN_BINDING (3) 508 #define MAX_BINDINGS (4) 509 #define AUX_BINDING_INDEX (3) 510 #define MAX_PHYS (4) 511 512 /* Used to extract ID and color from the context dword */ 513 #define FW_CTXT_ID_POS (0) 514 #define FW_CTXT_ID_MSK (0xff << FW_CTXT_ID_POS) 515 #define FW_CTXT_COLOR_POS (8) 516 #define FW_CTXT_COLOR_MSK (0xff << FW_CTXT_COLOR_POS) 517 #define FW_CTXT_INVALID (0xffffffff) 518 519 #define FW_CMD_ID_AND_COLOR(_id, _color) ((_id << FW_CTXT_ID_POS) |\ 520 (_color << FW_CTXT_COLOR_POS)) 521 522 /* Possible actions on PHYs, MACs and Bindings */ 523 enum { 524 FW_CTXT_ACTION_STUB = 0, 525 FW_CTXT_ACTION_ADD, 526 FW_CTXT_ACTION_MODIFY, 527 FW_CTXT_ACTION_REMOVE, 528 FW_CTXT_ACTION_NUM 529 }; /* COMMON_CONTEXT_ACTION_API_E_VER_1 */ 530 531 /* Time Events */ 532 533 /* Time Event types, according to MAC type */ 534 enum iwl_time_event_type { 535 /* BSS Station Events */ 536 TE_BSS_STA_AGGRESSIVE_ASSOC, 537 TE_BSS_STA_ASSOC, 538 TE_BSS_EAP_DHCP_PROT, 539 TE_BSS_QUIET_PERIOD, 540 541 /* P2P Device Events */ 542 TE_P2P_DEVICE_DISCOVERABLE, 543 TE_P2P_DEVICE_LISTEN, 544 TE_P2P_DEVICE_ACTION_SCAN, 545 TE_P2P_DEVICE_FULL_SCAN, 546 547 /* P2P Client Events */ 548 TE_P2P_CLIENT_AGGRESSIVE_ASSOC, 549 TE_P2P_CLIENT_ASSOC, 550 TE_P2P_CLIENT_QUIET_PERIOD, 551 552 /* P2P GO Events */ 553 TE_P2P_GO_ASSOC_PROT, 554 TE_P2P_GO_REPETITIVE_NOA, 555 TE_P2P_GO_CT_WINDOW, 556 557 /* WiDi Sync Events */ 558 TE_WIDI_TX_SYNC, 559 560 /* Channel Switch NoA */ 561 TE_CHANNEL_SWITCH_PERIOD, 562 563 TE_MAX 564 }; /* MAC_EVENT_TYPE_API_E_VER_1 */ 565 566 567 568 /* Time event - defines for command API v1 */ 569 570 /* 571 * @TE_V1_FRAG_NONE: fragmentation of the time event is NOT allowed. 572 * @TE_V1_FRAG_SINGLE: fragmentation of the time event is allowed, but only 573 * the first fragment is scheduled. 574 * @TE_V1_FRAG_DUAL: fragmentation of the time event is allowed, but only 575 * the first 2 fragments are scheduled. 576 * @TE_V1_FRAG_ENDLESS: fragmentation of the time event is allowed, and any 577 * number of fragments are valid. 578 * 579 * Other than the constant defined above, specifying a fragmentation value 'x' 580 * means that the event can be fragmented but only the first 'x' will be 581 * scheduled. 582 */ 583 enum { 584 TE_V1_FRAG_NONE = 0, 585 TE_V1_FRAG_SINGLE = 1, 586 TE_V1_FRAG_DUAL = 2, 587 TE_V1_FRAG_ENDLESS = 0xffffffff 588 }; 589 590 /* If a Time Event can be fragmented, this is the max number of fragments */ 591 #define TE_V1_FRAG_MAX_MSK 0x0fffffff 592 /* Repeat the time event endlessly (until removed) */ 593 #define TE_V1_REPEAT_ENDLESS 0xffffffff 594 /* If a Time Event has bounded repetitions, this is the maximal value */ 595 #define TE_V1_REPEAT_MAX_MSK_V1 0x0fffffff 596 597 /* Time Event dependencies: none, on another TE, or in a specific time */ 598 enum { 599 TE_V1_INDEPENDENT = 0, 600 TE_V1_DEP_OTHER = BIT(0), 601 TE_V1_DEP_TSF = BIT(1), 602 TE_V1_EVENT_SOCIOPATHIC = BIT(2), 603 }; /* MAC_EVENT_DEPENDENCY_POLICY_API_E_VER_2 */ 604 605 /* 606 * @TE_V1_NOTIF_NONE: no notifications 607 * @TE_V1_NOTIF_HOST_EVENT_START: request/receive notification on event start 608 * @TE_V1_NOTIF_HOST_EVENT_END:request/receive notification on event end 609 * @TE_V1_NOTIF_INTERNAL_EVENT_START: internal FW use 610 * @TE_V1_NOTIF_INTERNAL_EVENT_END: internal FW use. 611 * @TE_V1_NOTIF_HOST_FRAG_START: request/receive notification on frag start 612 * @TE_V1_NOTIF_HOST_FRAG_END:request/receive notification on frag end 613 * @TE_V1_NOTIF_INTERNAL_FRAG_START: internal FW use. 614 * @TE_V1_NOTIF_INTERNAL_FRAG_END: internal FW use. 615 * 616 * Supported Time event notifications configuration. 617 * A notification (both event and fragment) includes a status indicating weather 618 * the FW was able to schedule the event or not. For fragment start/end 619 * notification the status is always success. There is no start/end fragment 620 * notification for monolithic events. 621 */ 622 enum { 623 TE_V1_NOTIF_NONE = 0, 624 TE_V1_NOTIF_HOST_EVENT_START = BIT(0), 625 TE_V1_NOTIF_HOST_EVENT_END = BIT(1), 626 TE_V1_NOTIF_INTERNAL_EVENT_START = BIT(2), 627 TE_V1_NOTIF_INTERNAL_EVENT_END = BIT(3), 628 TE_V1_NOTIF_HOST_FRAG_START = BIT(4), 629 TE_V1_NOTIF_HOST_FRAG_END = BIT(5), 630 TE_V1_NOTIF_INTERNAL_FRAG_START = BIT(6), 631 TE_V1_NOTIF_INTERNAL_FRAG_END = BIT(7), 632 }; /* MAC_EVENT_ACTION_API_E_VER_2 */ 633 634 /* Time event - defines for command API */ 635 636 /* 637 * @TE_V2_FRAG_NONE: fragmentation of the time event is NOT allowed. 638 * @TE_V2_FRAG_SINGLE: fragmentation of the time event is allowed, but only 639 * the first fragment is scheduled. 640 * @TE_V2_FRAG_DUAL: fragmentation of the time event is allowed, but only 641 * the first 2 fragments are scheduled. 642 * @TE_V2_FRAG_ENDLESS: fragmentation of the time event is allowed, and any 643 * number of fragments are valid. 644 * 645 * Other than the constant defined above, specifying a fragmentation value 'x' 646 * means that the event can be fragmented but only the first 'x' will be 647 * scheduled. 648 */ 649 enum { 650 TE_V2_FRAG_NONE = 0, 651 TE_V2_FRAG_SINGLE = 1, 652 TE_V2_FRAG_DUAL = 2, 653 TE_V2_FRAG_MAX = 0xfe, 654 TE_V2_FRAG_ENDLESS = 0xff 655 }; 656 657 /* Repeat the time event endlessly (until removed) */ 658 #define TE_V2_REPEAT_ENDLESS 0xff 659 /* If a Time Event has bounded repetitions, this is the maximal value */ 660 #define TE_V2_REPEAT_MAX 0xfe 661 662 #define TE_V2_PLACEMENT_POS 12 663 #define TE_V2_ABSENCE_POS 15 664 665 /* Time event policy values 666 * A notification (both event and fragment) includes a status indicating weather 667 * the FW was able to schedule the event or not. For fragment start/end 668 * notification the status is always success. There is no start/end fragment 669 * notification for monolithic events. 670 * 671 * @TE_V2_DEFAULT_POLICY: independent, social, present, unoticable 672 * @TE_V2_NOTIF_HOST_EVENT_START: request/receive notification on event start 673 * @TE_V2_NOTIF_HOST_EVENT_END:request/receive notification on event end 674 * @TE_V2_NOTIF_INTERNAL_EVENT_START: internal FW use 675 * @TE_V2_NOTIF_INTERNAL_EVENT_END: internal FW use. 676 * @TE_V2_NOTIF_HOST_FRAG_START: request/receive notification on frag start 677 * @TE_V2_NOTIF_HOST_FRAG_END:request/receive notification on frag end 678 * @TE_V2_NOTIF_INTERNAL_FRAG_START: internal FW use. 679 * @TE_V2_NOTIF_INTERNAL_FRAG_END: internal FW use. 680 * @TE_V2_DEP_OTHER: depends on another time event 681 * @TE_V2_DEP_TSF: depends on a specific time 682 * @TE_V2_EVENT_SOCIOPATHIC: can't co-exist with other events of tha same MAC 683 * @TE_V2_ABSENCE: are we present or absent during the Time Event. 684 */ 685 enum { 686 TE_V2_DEFAULT_POLICY = 0x0, 687 688 /* notifications (event start/stop, fragment start/stop) */ 689 TE_V2_NOTIF_HOST_EVENT_START = BIT(0), 690 TE_V2_NOTIF_HOST_EVENT_END = BIT(1), 691 TE_V2_NOTIF_INTERNAL_EVENT_START = BIT(2), 692 TE_V2_NOTIF_INTERNAL_EVENT_END = BIT(3), 693 694 TE_V2_NOTIF_HOST_FRAG_START = BIT(4), 695 TE_V2_NOTIF_HOST_FRAG_END = BIT(5), 696 TE_V2_NOTIF_INTERNAL_FRAG_START = BIT(6), 697 TE_V2_NOTIF_INTERNAL_FRAG_END = BIT(7), 698 T2_V2_START_IMMEDIATELY = BIT(11), 699 700 TE_V2_NOTIF_MSK = 0xff, 701 702 /* placement characteristics */ 703 TE_V2_DEP_OTHER = BIT(TE_V2_PLACEMENT_POS), 704 TE_V2_DEP_TSF = BIT(TE_V2_PLACEMENT_POS + 1), 705 TE_V2_EVENT_SOCIOPATHIC = BIT(TE_V2_PLACEMENT_POS + 2), 706 707 /* are we present or absent during the Time Event. */ 708 TE_V2_ABSENCE = BIT(TE_V2_ABSENCE_POS), 709 }; 710 711 /** 712 * struct iwl_time_event_cmd_api - configuring Time Events 713 * with struct MAC_TIME_EVENT_DATA_API_S_VER_2 (see also 714 * with version 1. determined by IWL_UCODE_TLV_FLAGS) 715 * ( TIME_EVENT_CMD = 0x29 ) 716 * @id_and_color: ID and color of the relevant MAC 717 * @action: action to perform, one of FW_CTXT_ACTION_* 718 * @id: this field has two meanings, depending on the action: 719 * If the action is ADD, then it means the type of event to add. 720 * For all other actions it is the unique event ID assigned when the 721 * event was added by the FW. 722 * @apply_time: When to start the Time Event (in GP2) 723 * @max_delay: maximum delay to event's start (apply time), in TU 724 * @depends_on: the unique ID of the event we depend on (if any) 725 * @interval: interval between repetitions, in TU 726 * @duration: duration of event in TU 727 * @repeat: how many repetitions to do, can be TE_REPEAT_ENDLESS 728 * @max_frags: maximal number of fragments the Time Event can be divided to 729 * @policy: defines whether uCode shall notify the host or other uCode modules 730 * on event and/or fragment start and/or end 731 * using one of TE_INDEPENDENT, TE_DEP_OTHER, TE_DEP_TSF 732 * TE_EVENT_SOCIOPATHIC 733 * using TE_ABSENCE and using TE_NOTIF_* 734 */ 735 struct iwl_time_event_cmd { 736 /* COMMON_INDEX_HDR_API_S_VER_1 */ 737 __le32 id_and_color; 738 __le32 action; 739 __le32 id; 740 /* MAC_TIME_EVENT_DATA_API_S_VER_2 */ 741 __le32 apply_time; 742 __le32 max_delay; 743 __le32 depends_on; 744 __le32 interval; 745 __le32 duration; 746 u8 repeat; 747 u8 max_frags; 748 __le16 policy; 749 } __packed; /* MAC_TIME_EVENT_CMD_API_S_VER_2 */ 750 751 /** 752 * struct iwl_time_event_resp - response structure to iwl_time_event_cmd 753 * @status: bit 0 indicates success, all others specify errors 754 * @id: the Time Event type 755 * @unique_id: the unique ID assigned (in ADD) or given (others) to the TE 756 * @id_and_color: ID and color of the relevant MAC 757 */ 758 struct iwl_time_event_resp { 759 __le32 status; 760 __le32 id; 761 __le32 unique_id; 762 __le32 id_and_color; 763 } __packed; /* MAC_TIME_EVENT_RSP_API_S_VER_1 */ 764 765 /** 766 * struct iwl_time_event_notif - notifications of time event start/stop 767 * ( TIME_EVENT_NOTIFICATION = 0x2a ) 768 * @timestamp: action timestamp in GP2 769 * @session_id: session's unique id 770 * @unique_id: unique id of the Time Event itself 771 * @id_and_color: ID and color of the relevant MAC 772 * @action: one of TE_NOTIF_START or TE_NOTIF_END 773 * @status: true if scheduled, false otherwise (not executed) 774 */ 775 struct iwl_time_event_notif { 776 __le32 timestamp; 777 __le32 session_id; 778 __le32 unique_id; 779 __le32 id_and_color; 780 __le32 action; 781 __le32 status; 782 } __packed; /* MAC_TIME_EVENT_NTFY_API_S_VER_1 */ 783 784 785 /* Bindings and Time Quota */ 786 787 /** 788 * struct iwl_binding_cmd - configuring bindings 789 * ( BINDING_CONTEXT_CMD = 0x2b ) 790 * @id_and_color: ID and color of the relevant Binding 791 * @action: action to perform, one of FW_CTXT_ACTION_* 792 * @macs: array of MAC id and colors which belong to the binding 793 * @phy: PHY id and color which belongs to the binding 794 */ 795 struct iwl_binding_cmd { 796 /* COMMON_INDEX_HDR_API_S_VER_1 */ 797 __le32 id_and_color; 798 __le32 action; 799 /* BINDING_DATA_API_S_VER_1 */ 800 __le32 macs[MAX_MACS_IN_BINDING]; 801 __le32 phy; 802 } __packed; /* BINDING_CMD_API_S_VER_1 */ 803 804 /* The maximal number of fragments in the FW's schedule session */ 805 #define IWL_MVM_MAX_QUOTA 128 806 807 /** 808 * struct iwl_time_quota_data - configuration of time quota per binding 809 * @id_and_color: ID and color of the relevant Binding 810 * @quota: absolute time quota in TU. The scheduler will try to divide the 811 * remainig quota (after Time Events) according to this quota. 812 * @max_duration: max uninterrupted context duration in TU 813 */ 814 struct iwl_time_quota_data { 815 __le32 id_and_color; 816 __le32 quota; 817 __le32 max_duration; 818 } __packed; /* TIME_QUOTA_DATA_API_S_VER_1 */ 819 820 /** 821 * struct iwl_time_quota_cmd - configuration of time quota between bindings 822 * ( TIME_QUOTA_CMD = 0x2c ) 823 * @quotas: allocations per binding 824 */ 825 struct iwl_time_quota_cmd { 826 struct iwl_time_quota_data quotas[MAX_BINDINGS]; 827 } __packed; /* TIME_QUOTA_ALLOCATION_CMD_API_S_VER_1 */ 828 829 830 /* PHY context */ 831 832 /* Supported bands */ 833 #define PHY_BAND_5 (0) 834 #define PHY_BAND_24 (1) 835 836 /* Supported channel width, vary if there is VHT support */ 837 #define PHY_VHT_CHANNEL_MODE20 (0x0) 838 #define PHY_VHT_CHANNEL_MODE40 (0x1) 839 #define PHY_VHT_CHANNEL_MODE80 (0x2) 840 #define PHY_VHT_CHANNEL_MODE160 (0x3) 841 842 /* 843 * Control channel position: 844 * For legacy set bit means upper channel, otherwise lower. 845 * For VHT - bit-2 marks if the control is lower/upper relative to center-freq 846 * bits-1:0 mark the distance from the center freq. for 20Mhz, offset is 0. 847 * center_freq 848 * | 849 * 40Mhz |_______|_______| 850 * 80Mhz |_______|_______|_______|_______| 851 * 160Mhz |_______|_______|_______|_______|_______|_______|_______|_______| 852 * code 011 010 001 000 | 100 101 110 111 853 */ 854 #define PHY_VHT_CTRL_POS_1_BELOW (0x0) 855 #define PHY_VHT_CTRL_POS_2_BELOW (0x1) 856 #define PHY_VHT_CTRL_POS_3_BELOW (0x2) 857 #define PHY_VHT_CTRL_POS_4_BELOW (0x3) 858 #define PHY_VHT_CTRL_POS_1_ABOVE (0x4) 859 #define PHY_VHT_CTRL_POS_2_ABOVE (0x5) 860 #define PHY_VHT_CTRL_POS_3_ABOVE (0x6) 861 #define PHY_VHT_CTRL_POS_4_ABOVE (0x7) 862 863 /* 864 * @band: PHY_BAND_* 865 * @channel: channel number 866 * @width: PHY_[VHT|LEGACY]_CHANNEL_* 867 * @ctrl channel: PHY_[VHT|LEGACY]_CTRL_* 868 */ 869 struct iwl_fw_channel_info { 870 u8 band; 871 u8 channel; 872 u8 width; 873 u8 ctrl_pos; 874 } __packed; 875 876 #define PHY_RX_CHAIN_DRIVER_FORCE_POS (0) 877 #define PHY_RX_CHAIN_DRIVER_FORCE_MSK \ 878 (0x1 << PHY_RX_CHAIN_DRIVER_FORCE_POS) 879 #define PHY_RX_CHAIN_VALID_POS (1) 880 #define PHY_RX_CHAIN_VALID_MSK \ 881 (0x7 << PHY_RX_CHAIN_VALID_POS) 882 #define PHY_RX_CHAIN_FORCE_SEL_POS (4) 883 #define PHY_RX_CHAIN_FORCE_SEL_MSK \ 884 (0x7 << PHY_RX_CHAIN_FORCE_SEL_POS) 885 #define PHY_RX_CHAIN_FORCE_MIMO_SEL_POS (7) 886 #define PHY_RX_CHAIN_FORCE_MIMO_SEL_MSK \ 887 (0x7 << PHY_RX_CHAIN_FORCE_MIMO_SEL_POS) 888 #define PHY_RX_CHAIN_CNT_POS (10) 889 #define PHY_RX_CHAIN_CNT_MSK \ 890 (0x3 << PHY_RX_CHAIN_CNT_POS) 891 #define PHY_RX_CHAIN_MIMO_CNT_POS (12) 892 #define PHY_RX_CHAIN_MIMO_CNT_MSK \ 893 (0x3 << PHY_RX_CHAIN_MIMO_CNT_POS) 894 #define PHY_RX_CHAIN_MIMO_FORCE_POS (14) 895 #define PHY_RX_CHAIN_MIMO_FORCE_MSK \ 896 (0x1 << PHY_RX_CHAIN_MIMO_FORCE_POS) 897 898 /* TODO: fix the value, make it depend on firmware at runtime? */ 899 #define NUM_PHY_CTX 3 900 901 /* TODO: complete missing documentation */ 902 /** 903 * struct iwl_phy_context_cmd - config of the PHY context 904 * ( PHY_CONTEXT_CMD = 0x8 ) 905 * @id_and_color: ID and color of the relevant Binding 906 * @action: action to perform, one of FW_CTXT_ACTION_* 907 * @apply_time: 0 means immediate apply and context switch. 908 * other value means apply new params after X usecs 909 * @tx_param_color: ??? 910 * @channel_info: 911 * @txchain_info: ??? 912 * @rxchain_info: ??? 913 * @acquisition_data: ??? 914 * @dsp_cfg_flags: set to 0 915 */ 916 struct iwl_phy_context_cmd { 917 /* COMMON_INDEX_HDR_API_S_VER_1 */ 918 __le32 id_and_color; 919 __le32 action; 920 /* PHY_CONTEXT_DATA_API_S_VER_1 */ 921 __le32 apply_time; 922 __le32 tx_param_color; 923 struct iwl_fw_channel_info ci; 924 __le32 txchain_info; 925 __le32 rxchain_info; 926 __le32 acquisition_data; 927 __le32 dsp_cfg_flags; 928 } __packed; /* PHY_CONTEXT_CMD_API_VER_1 */ 929 930 /* 931 * Aux ROC command 932 * 933 * Command requests the firmware to create a time event for a certain duration 934 * and remain on the given channel. This is done by using the Aux framework in 935 * the FW. 936 * The command was first used for Hot Spot issues - but can be used regardless 937 * to Hot Spot. 938 * 939 * ( HOT_SPOT_CMD 0x53 ) 940 * 941 * @id_and_color: ID and color of the MAC 942 * @action: action to perform, one of FW_CTXT_ACTION_* 943 * @event_unique_id: If the action FW_CTXT_ACTION_REMOVE then the 944 * event_unique_id should be the id of the time event assigned by ucode. 945 * Otherwise ignore the event_unique_id. 946 * @sta_id_and_color: station id and color, resumed during "Remain On Channel" 947 * activity. 948 * @channel_info: channel info 949 * @node_addr: Our MAC Address 950 * @reserved: reserved for alignment 951 * @apply_time: GP2 value to start (should always be the current GP2 value) 952 * @apply_time_max_delay: Maximum apply time delay value in TU. Defines max 953 * time by which start of the event is allowed to be postponed. 954 * @duration: event duration in TU To calculate event duration: 955 * timeEventDuration = min(duration, remainingQuota) 956 */ 957 struct iwl_hs20_roc_req { 958 /* COMMON_INDEX_HDR_API_S_VER_1 hdr */ 959 __le32 id_and_color; 960 __le32 action; 961 __le32 event_unique_id; 962 __le32 sta_id_and_color; 963 struct iwl_fw_channel_info channel_info; 964 u8 node_addr[ETH_ALEN]; 965 __le16 reserved; 966 __le32 apply_time; 967 __le32 apply_time_max_delay; 968 __le32 duration; 969 } __packed; /* HOT_SPOT_CMD_API_S_VER_1 */ 970 971 /* 972 * values for AUX ROC result values 973 */ 974 enum iwl_mvm_hot_spot { 975 HOT_SPOT_RSP_STATUS_OK, 976 HOT_SPOT_RSP_STATUS_TOO_MANY_EVENTS, 977 HOT_SPOT_MAX_NUM_OF_SESSIONS, 978 }; 979 980 /* 981 * Aux ROC command response 982 * 983 * In response to iwl_hs20_roc_req the FW sends this command to notify the 984 * driver the uid of the timevent. 985 * 986 * ( HOT_SPOT_CMD 0x53 ) 987 * 988 * @event_unique_id: Unique ID of time event assigned by ucode 989 * @status: Return status 0 is success, all the rest used for specific errors 990 */ 991 struct iwl_hs20_roc_res { 992 __le32 event_unique_id; 993 __le32 status; 994 } __packed; /* HOT_SPOT_RSP_API_S_VER_1 */ 995 996 #define IWL_RX_INFO_PHY_CNT 8 997 #define IWL_RX_INFO_ENERGY_ANT_ABC_IDX 1 998 #define IWL_RX_INFO_ENERGY_ANT_A_MSK 0x000000ff 999 #define IWL_RX_INFO_ENERGY_ANT_B_MSK 0x0000ff00 1000 #define IWL_RX_INFO_ENERGY_ANT_C_MSK 0x00ff0000 1001 #define IWL_RX_INFO_ENERGY_ANT_A_POS 0 1002 #define IWL_RX_INFO_ENERGY_ANT_B_POS 8 1003 #define IWL_RX_INFO_ENERGY_ANT_C_POS 16 1004 1005 #define IWL_RX_INFO_AGC_IDX 1 1006 #define IWL_RX_INFO_RSSI_AB_IDX 2 1007 #define IWL_OFDM_AGC_A_MSK 0x0000007f 1008 #define IWL_OFDM_AGC_A_POS 0 1009 #define IWL_OFDM_AGC_B_MSK 0x00003f80 1010 #define IWL_OFDM_AGC_B_POS 7 1011 #define IWL_OFDM_AGC_CODE_MSK 0x3fe00000 1012 #define IWL_OFDM_AGC_CODE_POS 20 1013 #define IWL_OFDM_RSSI_INBAND_A_MSK 0x00ff 1014 #define IWL_OFDM_RSSI_A_POS 0 1015 #define IWL_OFDM_RSSI_ALLBAND_A_MSK 0xff00 1016 #define IWL_OFDM_RSSI_ALLBAND_A_POS 8 1017 #define IWL_OFDM_RSSI_INBAND_B_MSK 0xff0000 1018 #define IWL_OFDM_RSSI_B_POS 16 1019 #define IWL_OFDM_RSSI_ALLBAND_B_MSK 0xff000000 1020 #define IWL_OFDM_RSSI_ALLBAND_B_POS 24 1021 1022 /** 1023 * struct iwl_rx_phy_info - phy info 1024 * (REPLY_RX_PHY_CMD = 0xc0) 1025 * @non_cfg_phy_cnt: non configurable DSP phy data byte count 1026 * @cfg_phy_cnt: configurable DSP phy data byte count 1027 * @stat_id: configurable DSP phy data set ID 1028 * @reserved1: 1029 * @system_timestamp: GP2 at on air rise 1030 * @timestamp: TSF at on air rise 1031 * @beacon_time_stamp: beacon at on-air rise 1032 * @phy_flags: general phy flags: band, modulation, ... 1033 * @channel: channel number 1034 * @non_cfg_phy_buf: for various implementations of non_cfg_phy 1035 * @rate_n_flags: RATE_MCS_* 1036 * @byte_count: frame's byte-count 1037 * @frame_time: frame's time on the air, based on byte count and frame rate 1038 * calculation 1039 * @mac_active_msk: what MACs were active when the frame was received 1040 * 1041 * Before each Rx, the device sends this data. It contains PHY information 1042 * about the reception of the packet. 1043 */ 1044 struct iwl_rx_phy_info { 1045 u8 non_cfg_phy_cnt; 1046 u8 cfg_phy_cnt; 1047 u8 stat_id; 1048 u8 reserved1; 1049 __le32 system_timestamp; 1050 __le64 timestamp; 1051 __le32 beacon_time_stamp; 1052 __le16 phy_flags; 1053 __le16 channel; 1054 __le32 non_cfg_phy[IWL_RX_INFO_PHY_CNT]; 1055 __le32 rate_n_flags; 1056 __le32 byte_count; 1057 __le16 mac_active_msk; 1058 __le16 frame_time; 1059 } __packed; 1060 1061 struct iwl_rx_mpdu_res_start { 1062 __le16 byte_count; 1063 __le16 reserved; 1064 } __packed; 1065 1066 /** 1067 * enum iwl_rx_phy_flags - to parse %iwl_rx_phy_info phy_flags 1068 * @RX_RES_PHY_FLAGS_BAND_24: true if the packet was received on 2.4 band 1069 * @RX_RES_PHY_FLAGS_MOD_CCK: 1070 * @RX_RES_PHY_FLAGS_SHORT_PREAMBLE: true if packet's preamble was short 1071 * @RX_RES_PHY_FLAGS_NARROW_BAND: 1072 * @RX_RES_PHY_FLAGS_ANTENNA: antenna on which the packet was received 1073 * @RX_RES_PHY_FLAGS_AGG: set if the packet was part of an A-MPDU 1074 * @RX_RES_PHY_FLAGS_OFDM_HT: The frame was an HT frame 1075 * @RX_RES_PHY_FLAGS_OFDM_GF: The frame used GF preamble 1076 * @RX_RES_PHY_FLAGS_OFDM_VHT: The frame was a VHT frame 1077 */ 1078 enum iwl_rx_phy_flags { 1079 RX_RES_PHY_FLAGS_BAND_24 = BIT(0), 1080 RX_RES_PHY_FLAGS_MOD_CCK = BIT(1), 1081 RX_RES_PHY_FLAGS_SHORT_PREAMBLE = BIT(2), 1082 RX_RES_PHY_FLAGS_NARROW_BAND = BIT(3), 1083 RX_RES_PHY_FLAGS_ANTENNA = (0x7 << 4), 1084 RX_RES_PHY_FLAGS_ANTENNA_POS = 4, 1085 RX_RES_PHY_FLAGS_AGG = BIT(7), 1086 RX_RES_PHY_FLAGS_OFDM_HT = BIT(8), 1087 RX_RES_PHY_FLAGS_OFDM_GF = BIT(9), 1088 RX_RES_PHY_FLAGS_OFDM_VHT = BIT(10), 1089 }; 1090 1091 /** 1092 * enum iwl_mvm_rx_status - written by fw for each Rx packet 1093 * @RX_MPDU_RES_STATUS_CRC_OK: CRC is fine 1094 * @RX_MPDU_RES_STATUS_OVERRUN_OK: there was no RXE overflow 1095 * @RX_MPDU_RES_STATUS_SRC_STA_FOUND: 1096 * @RX_MPDU_RES_STATUS_KEY_VALID: 1097 * @RX_MPDU_RES_STATUS_KEY_PARAM_OK: 1098 * @RX_MPDU_RES_STATUS_ICV_OK: ICV is fine, if not, the packet is destroyed 1099 * @RX_MPDU_RES_STATUS_MIC_OK: used for CCM alg only. TKIP MIC is checked 1100 * in the driver. 1101 * @RX_MPDU_RES_STATUS_TTAK_OK: TTAK is fine 1102 * @RX_MPDU_RES_STATUS_MNG_FRAME_REPLAY_ERR: valid for alg = CCM_CMAC or 1103 * alg = CCM only. Checks replay attack for 11w frames. Relevant only if 1104 * %RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME is set. 1105 * @RX_MPDU_RES_STATUS_SEC_NO_ENC: this frame is not encrypted 1106 * @RX_MPDU_RES_STATUS_SEC_WEP_ENC: this frame is encrypted using WEP 1107 * @RX_MPDU_RES_STATUS_SEC_CCM_ENC: this frame is encrypted using CCM 1108 * @RX_MPDU_RES_STATUS_SEC_TKIP_ENC: this frame is encrypted using TKIP 1109 * @RX_MPDU_RES_STATUS_SEC_CCM_CMAC_ENC: this frame is encrypted using CCM_CMAC 1110 * @RX_MPDU_RES_STATUS_SEC_ENC_ERR: this frame couldn't be decrypted 1111 * @RX_MPDU_RES_STATUS_SEC_ENC_MSK: bitmask of the encryption algorithm 1112 * @RX_MPDU_RES_STATUS_DEC_DONE: this frame has been successfully decrypted 1113 * @RX_MPDU_RES_STATUS_PROTECT_FRAME_BIT_CMP: 1114 * @RX_MPDU_RES_STATUS_EXT_IV_BIT_CMP: 1115 * @RX_MPDU_RES_STATUS_KEY_ID_CMP_BIT: 1116 * @RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME: this frame is an 11w management frame 1117 * @RX_MPDU_RES_STATUS_HASH_INDEX_MSK: 1118 * @RX_MPDU_RES_STATUS_STA_ID_MSK: 1119 * @RX_MPDU_RES_STATUS_RRF_KILL: 1120 * @RX_MPDU_RES_STATUS_FILTERING_MSK: 1121 * @RX_MPDU_RES_STATUS2_FILTERING_MSK: 1122 */ 1123 enum iwl_mvm_rx_status { 1124 RX_MPDU_RES_STATUS_CRC_OK = BIT(0), 1125 RX_MPDU_RES_STATUS_OVERRUN_OK = BIT(1), 1126 RX_MPDU_RES_STATUS_SRC_STA_FOUND = BIT(2), 1127 RX_MPDU_RES_STATUS_KEY_VALID = BIT(3), 1128 RX_MPDU_RES_STATUS_KEY_PARAM_OK = BIT(4), 1129 RX_MPDU_RES_STATUS_ICV_OK = BIT(5), 1130 RX_MPDU_RES_STATUS_MIC_OK = BIT(6), 1131 RX_MPDU_RES_STATUS_TTAK_OK = BIT(7), 1132 RX_MPDU_RES_STATUS_MNG_FRAME_REPLAY_ERR = BIT(7), 1133 RX_MPDU_RES_STATUS_SEC_NO_ENC = (0 << 8), 1134 RX_MPDU_RES_STATUS_SEC_WEP_ENC = (1 << 8), 1135 RX_MPDU_RES_STATUS_SEC_CCM_ENC = (2 << 8), 1136 RX_MPDU_RES_STATUS_SEC_TKIP_ENC = (3 << 8), 1137 RX_MPDU_RES_STATUS_SEC_EXT_ENC = (4 << 8), 1138 RX_MPDU_RES_STATUS_SEC_CCM_CMAC_ENC = (6 << 8), 1139 RX_MPDU_RES_STATUS_SEC_ENC_ERR = (7 << 8), 1140 RX_MPDU_RES_STATUS_SEC_ENC_MSK = (7 << 8), 1141 RX_MPDU_RES_STATUS_DEC_DONE = BIT(11), 1142 RX_MPDU_RES_STATUS_PROTECT_FRAME_BIT_CMP = BIT(12), 1143 RX_MPDU_RES_STATUS_EXT_IV_BIT_CMP = BIT(13), 1144 RX_MPDU_RES_STATUS_KEY_ID_CMP_BIT = BIT(14), 1145 RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME = BIT(15), 1146 RX_MPDU_RES_STATUS_HASH_INDEX_MSK = (0x3F0000), 1147 RX_MPDU_RES_STATUS_STA_ID_MSK = (0x1f000000), 1148 RX_MPDU_RES_STATUS_RRF_KILL = BIT(29), 1149 RX_MPDU_RES_STATUS_FILTERING_MSK = (0xc00000), 1150 RX_MPDU_RES_STATUS2_FILTERING_MSK = (0xc0000000), 1151 }; 1152 1153 /** 1154 * struct iwl_radio_version_notif - information on the radio version 1155 * ( RADIO_VERSION_NOTIFICATION = 0x68 ) 1156 * @radio_flavor: 1157 * @radio_step: 1158 * @radio_dash: 1159 */ 1160 struct iwl_radio_version_notif { 1161 __le32 radio_flavor; 1162 __le32 radio_step; 1163 __le32 radio_dash; 1164 } __packed; /* RADIO_VERSION_NOTOFICATION_S_VER_1 */ 1165 1166 enum iwl_card_state_flags { 1167 CARD_ENABLED = 0x00, 1168 HW_CARD_DISABLED = 0x01, 1169 SW_CARD_DISABLED = 0x02, 1170 CT_KILL_CARD_DISABLED = 0x04, 1171 HALT_CARD_DISABLED = 0x08, 1172 CARD_DISABLED_MSK = 0x0f, 1173 CARD_IS_RX_ON = 0x10, 1174 }; 1175 1176 /** 1177 * struct iwl_radio_version_notif - information on the radio version 1178 * ( CARD_STATE_NOTIFICATION = 0xa1 ) 1179 * @flags: %iwl_card_state_flags 1180 */ 1181 struct iwl_card_state_notif { 1182 __le32 flags; 1183 } __packed; /* CARD_STATE_NTFY_API_S_VER_1 */ 1184 1185 /** 1186 * struct iwl_missed_beacons_notif - information on missed beacons 1187 * ( MISSED_BEACONS_NOTIFICATION = 0xa2 ) 1188 * @mac_id: interface ID 1189 * @consec_missed_beacons_since_last_rx: number of consecutive missed 1190 * beacons since last RX. 1191 * @consec_missed_beacons: number of consecutive missed beacons 1192 * @num_expected_beacons: 1193 * @num_recvd_beacons: 1194 */ 1195 struct iwl_missed_beacons_notif { 1196 __le32 mac_id; 1197 __le32 consec_missed_beacons_since_last_rx; 1198 __le32 consec_missed_beacons; 1199 __le32 num_expected_beacons; 1200 __le32 num_recvd_beacons; 1201 } __packed; /* MISSED_BEACON_NTFY_API_S_VER_3 */ 1202 1203 /** 1204 * struct iwl_set_calib_default_cmd - set default value for calibration. 1205 * ( SET_CALIB_DEFAULT_CMD = 0x8e ) 1206 * @calib_index: the calibration to set value for 1207 * @length: of data 1208 * @data: the value to set for the calibration result 1209 */ 1210 struct iwl_set_calib_default_cmd { 1211 __le16 calib_index; 1212 __le16 length; 1213 u8 data[0]; 1214 } __packed; /* PHY_CALIB_OVERRIDE_VALUES_S */ 1215 1216 #define MAX_PORT_ID_NUM 2 1217 #define MAX_MCAST_FILTERING_ADDRESSES 256 1218 1219 /** 1220 * struct iwl_mcast_filter_cmd - configure multicast filter. 1221 * @filter_own: Set 1 to filter out multicast packets sent by station itself 1222 * @port_id: Multicast MAC addresses array specifier. This is a strange way 1223 * to identify network interface adopted in host-device IF. 1224 * It is used by FW as index in array of addresses. This array has 1225 * MAX_PORT_ID_NUM members. 1226 * @count: Number of MAC addresses in the array 1227 * @pass_all: Set 1 to pass all multicast packets. 1228 * @bssid: current association BSSID. 1229 * @addr_list: Place holder for array of MAC addresses. 1230 * IMPORTANT: add padding if necessary to ensure DWORD alignment. 1231 */ 1232 struct iwl_mcast_filter_cmd { 1233 u8 filter_own; 1234 u8 port_id; 1235 u8 count; 1236 u8 pass_all; 1237 u8 bssid[6]; 1238 u8 reserved[2]; 1239 u8 addr_list[0]; 1240 } __packed; /* MCAST_FILTERING_CMD_API_S_VER_1 */ 1241 1242 #define MAX_BCAST_FILTERS 8 1243 #define MAX_BCAST_FILTER_ATTRS 2 1244 1245 /** 1246 * enum iwl_mvm_bcast_filter_attr_offset - written by fw for each Rx packet 1247 * @BCAST_FILTER_OFFSET_PAYLOAD_START: offset is from payload start. 1248 * @BCAST_FILTER_OFFSET_IP_END: offset is from ip header end (i.e. 1249 * start of ip payload). 1250 */ 1251 enum iwl_mvm_bcast_filter_attr_offset { 1252 BCAST_FILTER_OFFSET_PAYLOAD_START = 0, 1253 BCAST_FILTER_OFFSET_IP_END = 1, 1254 }; 1255 1256 /** 1257 * struct iwl_fw_bcast_filter_attr - broadcast filter attribute 1258 * @offset_type: &enum iwl_mvm_bcast_filter_attr_offset. 1259 * @offset: starting offset of this pattern. 1260 * @val: value to match - big endian (MSB is the first 1261 * byte to match from offset pos). 1262 * @mask: mask to match (big endian). 1263 */ 1264 struct iwl_fw_bcast_filter_attr { 1265 u8 offset_type; 1266 u8 offset; 1267 __le16 reserved1; 1268 __be32 val; 1269 __be32 mask; 1270 } __packed; /* BCAST_FILTER_ATT_S_VER_1 */ 1271 1272 /** 1273 * enum iwl_mvm_bcast_filter_frame_type - filter frame type 1274 * @BCAST_FILTER_FRAME_TYPE_ALL: consider all frames. 1275 * @BCAST_FILTER_FRAME_TYPE_IPV4: consider only ipv4 frames 1276 */ 1277 enum iwl_mvm_bcast_filter_frame_type { 1278 BCAST_FILTER_FRAME_TYPE_ALL = 0, 1279 BCAST_FILTER_FRAME_TYPE_IPV4 = 1, 1280 }; 1281 1282 /** 1283 * struct iwl_fw_bcast_filter - broadcast filter 1284 * @discard: discard frame (1) or let it pass (0). 1285 * @frame_type: &enum iwl_mvm_bcast_filter_frame_type. 1286 * @num_attrs: number of valid attributes in this filter. 1287 * @attrs: attributes of this filter. a filter is considered matched 1288 * only when all its attributes are matched (i.e. AND relationship) 1289 */ 1290 struct iwl_fw_bcast_filter { 1291 u8 discard; 1292 u8 frame_type; 1293 u8 num_attrs; 1294 u8 reserved1; 1295 struct iwl_fw_bcast_filter_attr attrs[MAX_BCAST_FILTER_ATTRS]; 1296 } __packed; /* BCAST_FILTER_S_VER_1 */ 1297 1298 /** 1299 * struct iwl_fw_bcast_mac - per-mac broadcast filtering configuration. 1300 * @default_discard: default action for this mac (discard (1) / pass (0)). 1301 * @attached_filters: bitmap of relevant filters for this mac. 1302 */ 1303 struct iwl_fw_bcast_mac { 1304 u8 default_discard; 1305 u8 reserved1; 1306 __le16 attached_filters; 1307 } __packed; /* BCAST_MAC_CONTEXT_S_VER_1 */ 1308 1309 /** 1310 * struct iwl_bcast_filter_cmd - broadcast filtering configuration 1311 * @disable: enable (0) / disable (1) 1312 * @max_bcast_filters: max number of filters (MAX_BCAST_FILTERS) 1313 * @max_macs: max number of macs (NUM_MAC_INDEX_DRIVER) 1314 * @filters: broadcast filters 1315 * @macs: broadcast filtering configuration per-mac 1316 */ 1317 struct iwl_bcast_filter_cmd { 1318 u8 disable; 1319 u8 max_bcast_filters; 1320 u8 max_macs; 1321 u8 reserved1; 1322 struct iwl_fw_bcast_filter filters[MAX_BCAST_FILTERS]; 1323 struct iwl_fw_bcast_mac macs[NUM_MAC_INDEX_DRIVER]; 1324 } __packed; /* BCAST_FILTERING_HCMD_API_S_VER_1 */ 1325 1326 /* 1327 * enum iwl_mvm_marker_id - maker ids 1328 * 1329 * The ids for different type of markers to insert into the usniffer logs 1330 */ 1331 enum iwl_mvm_marker_id { 1332 MARKER_ID_TX_FRAME_LATENCY = 1, 1333 }; /* MARKER_ID_API_E_VER_1 */ 1334 1335 /** 1336 * struct iwl_mvm_marker - mark info into the usniffer logs 1337 * 1338 * (MARKER_CMD = 0xcb) 1339 * 1340 * Mark the UTC time stamp into the usniffer logs together with additional 1341 * metadata, so the usniffer output can be parsed. 1342 * In the command response the ucode will return the GP2 time. 1343 * 1344 * @dw_len: The amount of dwords following this byte including this byte. 1345 * @marker_id: A unique marker id (iwl_mvm_marker_id). 1346 * @reserved: reserved. 1347 * @timestamp: in milliseconds since 1970-01-01 00:00:00 UTC 1348 * @metadata: additional meta data that will be written to the unsiffer log 1349 */ 1350 struct iwl_mvm_marker { 1351 u8 dwLen; 1352 u8 markerId; 1353 __le16 reserved; 1354 __le64 timestamp; 1355 __le32 metadata[0]; 1356 } __packed; /* MARKER_API_S_VER_1 */ 1357 1358 struct mvm_statistics_dbg { 1359 __le32 burst_check; 1360 __le32 burst_count; 1361 __le32 wait_for_silence_timeout_cnt; 1362 __le32 reserved[3]; 1363 } __packed; /* STATISTICS_DEBUG_API_S_VER_2 */ 1364 1365 struct mvm_statistics_div { 1366 __le32 tx_on_a; 1367 __le32 tx_on_b; 1368 __le32 exec_time; 1369 __le32 probe_time; 1370 __le32 rssi_ant; 1371 __le32 reserved2; 1372 } __packed; /* STATISTICS_SLOW_DIV_API_S_VER_2 */ 1373 1374 struct mvm_statistics_general_common { 1375 __le32 temperature; /* radio temperature */ 1376 __le32 temperature_m; /* radio voltage */ 1377 struct mvm_statistics_dbg dbg; 1378 __le32 sleep_time; 1379 __le32 slots_out; 1380 __le32 slots_idle; 1381 __le32 ttl_timestamp; 1382 struct mvm_statistics_div div; 1383 __le32 rx_enable_counter; 1384 /* 1385 * num_of_sos_states: 1386 * count the number of times we have to re-tune 1387 * in order to get out of bad PHY status 1388 */ 1389 __le32 num_of_sos_states; 1390 } __packed; /* STATISTICS_GENERAL_API_S_VER_5 */ 1391 1392 struct mvm_statistics_rx_non_phy { 1393 __le32 bogus_cts; /* CTS received when not expecting CTS */ 1394 __le32 bogus_ack; /* ACK received when not expecting ACK */ 1395 __le32 non_bssid_frames; /* number of frames with BSSID that 1396 * doesn't belong to the STA BSSID */ 1397 __le32 filtered_frames; /* count frames that were dumped in the 1398 * filtering process */ 1399 __le32 non_channel_beacons; /* beacons with our bss id but not on 1400 * our serving channel */ 1401 __le32 channel_beacons; /* beacons with our bss id and in our 1402 * serving channel */ 1403 __le32 num_missed_bcon; /* number of missed beacons */ 1404 __le32 adc_rx_saturation_time; /* count in 0.8us units the time the 1405 * ADC was in saturation */ 1406 __le32 ina_detection_search_time;/* total time (in 0.8us) searched 1407 * for INA */ 1408 __le32 beacon_silence_rssi_a; /* RSSI silence after beacon frame */ 1409 __le32 beacon_silence_rssi_b; /* RSSI silence after beacon frame */ 1410 __le32 beacon_silence_rssi_c; /* RSSI silence after beacon frame */ 1411 __le32 interference_data_flag; /* flag for interference data 1412 * availability. 1 when data is 1413 * available. */ 1414 __le32 channel_load; /* counts RX Enable time in uSec */ 1415 __le32 dsp_false_alarms; /* DSP false alarm (both OFDM 1416 * and CCK) counter */ 1417 __le32 beacon_rssi_a; 1418 __le32 beacon_rssi_b; 1419 __le32 beacon_rssi_c; 1420 __le32 beacon_energy_a; 1421 __le32 beacon_energy_b; 1422 __le32 beacon_energy_c; 1423 __le32 num_bt_kills; 1424 __le32 mac_id; 1425 __le32 directed_data_mpdu; 1426 } __packed; /* STATISTICS_RX_NON_PHY_API_S_VER_3 */ 1427 1428 struct mvm_statistics_rx_phy { 1429 __le32 ina_cnt; 1430 __le32 fina_cnt; 1431 __le32 plcp_err; 1432 __le32 crc32_err; 1433 __le32 overrun_err; 1434 __le32 early_overrun_err; 1435 __le32 crc32_good; 1436 __le32 false_alarm_cnt; 1437 __le32 fina_sync_err_cnt; 1438 __le32 sfd_timeout; 1439 __le32 fina_timeout; 1440 __le32 unresponded_rts; 1441 __le32 rxe_frame_limit_overrun; 1442 __le32 sent_ack_cnt; 1443 __le32 sent_cts_cnt; 1444 __le32 sent_ba_rsp_cnt; 1445 __le32 dsp_self_kill; 1446 __le32 mh_format_err; 1447 __le32 re_acq_main_rssi_sum; 1448 __le32 reserved; 1449 } __packed; /* STATISTICS_RX_PHY_API_S_VER_2 */ 1450 1451 struct mvm_statistics_rx_ht_phy { 1452 __le32 plcp_err; 1453 __le32 overrun_err; 1454 __le32 early_overrun_err; 1455 __le32 crc32_good; 1456 __le32 crc32_err; 1457 __le32 mh_format_err; 1458 __le32 agg_crc32_good; 1459 __le32 agg_mpdu_cnt; 1460 __le32 agg_cnt; 1461 __le32 unsupport_mcs; 1462 } __packed; /* STATISTICS_HT_RX_PHY_API_S_VER_1 */ 1463 1464 #define MAX_CHAINS 3 1465 1466 struct mvm_statistics_tx_non_phy_agg { 1467 __le32 ba_timeout; 1468 __le32 ba_reschedule_frames; 1469 __le32 scd_query_agg_frame_cnt; 1470 __le32 scd_query_no_agg; 1471 __le32 scd_query_agg; 1472 __le32 scd_query_mismatch; 1473 __le32 frame_not_ready; 1474 __le32 underrun; 1475 __le32 bt_prio_kill; 1476 __le32 rx_ba_rsp_cnt; 1477 __s8 txpower[MAX_CHAINS]; 1478 __s8 reserved; 1479 __le32 reserved2; 1480 } __packed; /* STATISTICS_TX_NON_PHY_AGG_API_S_VER_1 */ 1481 1482 struct mvm_statistics_tx_channel_width { 1483 __le32 ext_cca_narrow_ch20[1]; 1484 __le32 ext_cca_narrow_ch40[2]; 1485 __le32 ext_cca_narrow_ch80[3]; 1486 __le32 ext_cca_narrow_ch160[4]; 1487 __le32 last_tx_ch_width_indx; 1488 __le32 rx_detected_per_ch_width[4]; 1489 __le32 success_per_ch_width[4]; 1490 __le32 fail_per_ch_width[4]; 1491 }; /* STATISTICS_TX_CHANNEL_WIDTH_API_S_VER_1 */ 1492 1493 struct mvm_statistics_tx { 1494 __le32 preamble_cnt; 1495 __le32 rx_detected_cnt; 1496 __le32 bt_prio_defer_cnt; 1497 __le32 bt_prio_kill_cnt; 1498 __le32 few_bytes_cnt; 1499 __le32 cts_timeout; 1500 __le32 ack_timeout; 1501 __le32 expected_ack_cnt; 1502 __le32 actual_ack_cnt; 1503 __le32 dump_msdu_cnt; 1504 __le32 burst_abort_next_frame_mismatch_cnt; 1505 __le32 burst_abort_missing_next_frame_cnt; 1506 __le32 cts_timeout_collision; 1507 __le32 ack_or_ba_timeout_collision; 1508 struct mvm_statistics_tx_non_phy_agg agg; 1509 struct mvm_statistics_tx_channel_width channel_width; 1510 } __packed; /* STATISTICS_TX_API_S_VER_4 */ 1511 1512 1513 struct mvm_statistics_bt_activity { 1514 __le32 hi_priority_tx_req_cnt; 1515 __le32 hi_priority_tx_denied_cnt; 1516 __le32 lo_priority_tx_req_cnt; 1517 __le32 lo_priority_tx_denied_cnt; 1518 __le32 hi_priority_rx_req_cnt; 1519 __le32 hi_priority_rx_denied_cnt; 1520 __le32 lo_priority_rx_req_cnt; 1521 __le32 lo_priority_rx_denied_cnt; 1522 } __packed; /* STATISTICS_BT_ACTIVITY_API_S_VER_1 */ 1523 1524 struct mvm_statistics_general { 1525 struct mvm_statistics_general_common common; 1526 __le32 beacon_filtered; 1527 __le32 missed_beacons; 1528 __s8 beacon_filter_average_energy; 1529 __s8 beacon_filter_reason; 1530 __s8 beacon_filter_current_energy; 1531 __s8 beacon_filter_reserved; 1532 __le32 beacon_filter_delta_time; 1533 struct mvm_statistics_bt_activity bt_activity; 1534 } __packed; /* STATISTICS_GENERAL_API_S_VER_5 */ 1535 1536 struct mvm_statistics_rx { 1537 struct mvm_statistics_rx_phy ofdm; 1538 struct mvm_statistics_rx_phy cck; 1539 struct mvm_statistics_rx_non_phy general; 1540 struct mvm_statistics_rx_ht_phy ofdm_ht; 1541 } __packed; /* STATISTICS_RX_API_S_VER_3 */ 1542 1543 /* 1544 * STATISTICS_NOTIFICATION = 0x9d (notification only, not a command) 1545 * 1546 * By default, uCode issues this notification after receiving a beacon 1547 * while associated. To disable this behavior, set DISABLE_NOTIF flag in the 1548 * REPLY_STATISTICS_CMD 0x9c, above. 1549 * 1550 * Statistics counters continue to increment beacon after beacon, but are 1551 * cleared when changing channels or when driver issues REPLY_STATISTICS_CMD 1552 * 0x9c with CLEAR_STATS bit set (see above). 1553 * 1554 * uCode also issues this notification during scans. uCode clears statistics 1555 * appropriately so that each notification contains statistics for only the 1556 * one channel that has just been scanned. 1557 */ 1558 1559 struct iwl_notif_statistics { /* STATISTICS_NTFY_API_S_VER_8 */ 1560 __le32 flag; 1561 struct mvm_statistics_rx rx; 1562 struct mvm_statistics_tx tx; 1563 struct mvm_statistics_general general; 1564 } __packed; 1565 1566 /*********************************** 1567 * Smart Fifo API 1568 ***********************************/ 1569 /* Smart Fifo state */ 1570 enum iwl_sf_state { 1571 SF_LONG_DELAY_ON = 0, /* should never be called by driver */ 1572 SF_FULL_ON, 1573 SF_UNINIT, 1574 SF_INIT_OFF, 1575 SF_HW_NUM_STATES 1576 }; 1577 1578 /* Smart Fifo possible scenario */ 1579 enum iwl_sf_scenario { 1580 SF_SCENARIO_SINGLE_UNICAST, 1581 SF_SCENARIO_AGG_UNICAST, 1582 SF_SCENARIO_MULTICAST, 1583 SF_SCENARIO_BA_RESP, 1584 SF_SCENARIO_TX_RESP, 1585 SF_NUM_SCENARIO 1586 }; 1587 1588 #define SF_TRANSIENT_STATES_NUMBER 2 /* SF_LONG_DELAY_ON and SF_FULL_ON */ 1589 #define SF_NUM_TIMEOUT_TYPES 2 /* Aging timer and Idle timer */ 1590 1591 /* smart FIFO default values */ 1592 #define SF_W_MARK_SISO 6144 1593 #define SF_W_MARK_MIMO2 8192 1594 #define SF_W_MARK_MIMO3 6144 1595 #define SF_W_MARK_LEGACY 4096 1596 #define SF_W_MARK_SCAN 4096 1597 1598 /* SF Scenarios timers for FULL_ON state (aligned to 32 uSec) */ 1599 #define SF_SINGLE_UNICAST_IDLE_TIMER 320 /* 300 uSec */ 1600 #define SF_SINGLE_UNICAST_AGING_TIMER 2016 /* 2 mSec */ 1601 #define SF_AGG_UNICAST_IDLE_TIMER 320 /* 300 uSec */ 1602 #define SF_AGG_UNICAST_AGING_TIMER 2016 /* 2 mSec */ 1603 #define SF_MCAST_IDLE_TIMER 2016 /* 2 mSec */ 1604 #define SF_MCAST_AGING_TIMER 10016 /* 10 mSec */ 1605 #define SF_BA_IDLE_TIMER 320 /* 300 uSec */ 1606 #define SF_BA_AGING_TIMER 2016 /* 2 mSec */ 1607 #define SF_TX_RE_IDLE_TIMER 320 /* 300 uSec */ 1608 #define SF_TX_RE_AGING_TIMER 2016 /* 2 mSec */ 1609 1610 #define SF_LONG_DELAY_AGING_TIMER 1000000 /* 1 Sec */ 1611 1612 #define SF_CFG_DUMMY_NOTIF_OFF BIT(16) 1613 1614 /** 1615 * Smart Fifo configuration command. 1616 * @state: smart fifo state, types listed in enum %iwl_sf_sate. 1617 * @watermark: Minimum allowed availabe free space in RXF for transient state. 1618 * @long_delay_timeouts: aging and idle timer values for each scenario 1619 * in long delay state. 1620 * @full_on_timeouts: timer values for each scenario in full on state. 1621 */ 1622 struct iwl_sf_cfg_cmd { 1623 __le32 state; 1624 __le32 watermark[SF_TRANSIENT_STATES_NUMBER]; 1625 __le32 long_delay_timeouts[SF_NUM_SCENARIO][SF_NUM_TIMEOUT_TYPES]; 1626 __le32 full_on_timeouts[SF_NUM_SCENARIO][SF_NUM_TIMEOUT_TYPES]; 1627 } __packed; /* SF_CFG_API_S_VER_2 */ 1628 1629 /* DTS measurements */ 1630 1631 enum iwl_dts_measurement_flags { 1632 DTS_TRIGGER_CMD_FLAGS_TEMP = BIT(0), 1633 DTS_TRIGGER_CMD_FLAGS_VOLT = BIT(1), 1634 }; 1635 1636 /** 1637 * iwl_dts_measurement_cmd - request DTS temperature and/or voltage measurements 1638 * 1639 * @flags: indicates which measurements we want as specified in &enum 1640 * iwl_dts_measurement_flags 1641 */ 1642 struct iwl_dts_measurement_cmd { 1643 __le32 flags; 1644 } __packed; /* TEMPERATURE_MEASUREMENT_TRIGGER_CMD_S */ 1645 1646 /** 1647 * iwl_dts_measurement_notif - notification received with the measurements 1648 * 1649 * @temp: the measured temperature 1650 * @voltage: the measured voltage 1651 */ 1652 struct iwl_dts_measurement_notif { 1653 __le32 temp; 1654 __le32 voltage; 1655 } __packed; /* TEMPERATURE_MEASUREMENT_TRIGGER_NTFY_S */ 1656 1657 /** 1658 * enum iwl_scd_control - scheduler config command control flags 1659 * @IWL_SCD_CONTROL_RM_TID: remove TID from this queue 1660 * @IWL_SCD_CONTROL_SET_SSN: use the SSN and program it into HW 1661 */ 1662 enum iwl_scd_control { 1663 IWL_SCD_CONTROL_RM_TID = BIT(4), 1664 IWL_SCD_CONTROL_SET_SSN = BIT(5), 1665 }; 1666 1667 /** 1668 * enum iwl_scd_flags - scheduler config command flags 1669 * @IWL_SCD_FLAGS_SHARE_TID: multiple TIDs map to this queue 1670 * @IWL_SCD_FLAGS_SHARE_RA: multiple RAs map to this queue 1671 * @IWL_SCD_FLAGS_DQA_ENABLED: DQA is enabled 1672 */ 1673 enum iwl_scd_flags { 1674 IWL_SCD_FLAGS_SHARE_TID = BIT(0), 1675 IWL_SCD_FLAGS_SHARE_RA = BIT(1), 1676 IWL_SCD_FLAGS_DQA_ENABLED = BIT(2), 1677 }; 1678 1679 #define IWL_SCDQ_INVALID_STA 0xff 1680 1681 /** 1682 * struct iwl_scd_txq_cfg_cmd - New txq hw scheduler config command 1683 * @token: dialog token addba - unused legacy 1684 * @sta_id: station id 4-bit 1685 * @tid: TID 0..7 1686 * @scd_queue: TFD queue num 0 .. 31 1687 * @enable: 1 queue enable, 0 queue disable 1688 * @aggregate: 1 aggregated queue, 0 otherwise 1689 * @tx_fifo: tx fifo num 0..7 1690 * @window: up to 64 1691 * @ssn: starting seq num 12-bit 1692 * @control: command control flags 1693 * @flags: flags - see &enum iwl_scd_flags 1694 * 1695 * Note that every time the command is sent, all parameters must 1696 * be filled with the exception of 1697 * - the SSN, which is only used with @IWL_SCD_CONTROL_SET_SSN 1698 * - the window, which is only relevant when starting aggregation 1699 */ 1700 struct iwl_scd_txq_cfg_cmd { 1701 u8 token; 1702 u8 sta_id; 1703 u8 tid; 1704 u8 scd_queue; 1705 u8 enable; 1706 u8 aggregate; 1707 u8 tx_fifo; 1708 u8 window; 1709 __le16 ssn; 1710 u8 control; 1711 u8 flags; 1712 } __packed; 1713 1714 #endif /* __fw_api_h__ */ 1715