Home
last modified time | relevance | path

Searched refs:AR_CH0_DDR_DPLL2 (Results 1 – 2 of 2) sorted by relevance

/drivers/net/wireless/ath/ath9k/
Dreg.h1241 #define AR_CH0_DDR_DPLL2 0x16244 macro
Dhw.c750 REG_WRITE(ah, AR_CH0_DDR_DPLL2, ddr_dpll2); in ath9k_hw_init_pll()