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Searched refs:AR_PHY_AGC_CONTROL (Results 1 – 5 of 5) sorted by relevance

/drivers/net/wireless/ath/ath9k/
Dcalib.c224 REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, in ath9k_hw_start_nfcal()
228 REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL, in ath9k_hw_start_nfcal()
231 REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, in ath9k_hw_start_nfcal()
234 REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_NF); in ath9k_hw_start_nfcal()
272 REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL, in ath9k_hw_loadnf()
274 REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL, in ath9k_hw_loadnf()
276 REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_NF); in ath9k_hw_loadnf()
285 if ((REG_READ(ah, AR_PHY_AGC_CONTROL) & in ath9k_hw_loadnf()
303 REG_READ(ah, AR_PHY_AGC_CONTROL)); in ath9k_hw_loadnf()
370 if (REG_READ(ah, AR_PHY_AGC_CONTROL) & AR_PHY_AGC_CONTROL_NF) { in ath9k_hw_getnf()
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Dar9003_calib.c349 REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL, in ar9003_hw_dynamic_osdac_selection()
353 REG_WRITE(ah, AR_PHY_AGC_CONTROL, in ar9003_hw_dynamic_osdac_selection()
354 REG_READ(ah, AR_PHY_AGC_CONTROL) | AR_PHY_AGC_CONTROL_CAL); in ar9003_hw_dynamic_osdac_selection()
356 status = ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL, in ar9003_hw_dynamic_osdac_selection()
370 REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, in ar9003_hw_dynamic_osdac_selection()
374 REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL, in ar9003_hw_dynamic_osdac_selection()
376 REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL, in ar9003_hw_dynamic_osdac_selection()
390 REG_WRITE(ah, AR_PHY_AGC_CONTROL, in ar9003_hw_dynamic_osdac_selection()
391 REG_READ(ah, AR_PHY_AGC_CONTROL) | AR_PHY_AGC_CONTROL_CAL); in ar9003_hw_dynamic_osdac_selection()
393 status = ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL, in ar9003_hw_dynamic_osdac_selection()
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Dar9002_calib.c669 nfcal = !!(REG_READ(ah, AR_PHY_AGC_CONTROL) & AR_PHY_AGC_CONTROL_NF); in ar9002_hw_calibrate()
724 REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL, in ar9285_hw_cl_cal()
727 REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_CAL); in ar9285_hw_cl_cal()
728 if (!ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL, in ar9285_hw_cl_cal()
740 REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_FLTR_CAL); in ar9285_hw_cl_cal()
742 REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_CAL); in ar9285_hw_cl_cal()
743 if (!ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_CAL, in ar9285_hw_cl_cal()
753 REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_FLTR_CAL); in ar9285_hw_cl_cal()
829 REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, in ar9002_hw_init_cal()
834 REG_WRITE(ah, AR_PHY_AGC_CONTROL, in ar9002_hw_init_cal()
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Dar9003_phy.c234 REG_RMW_FIELD(ah, AR_PHY_AGC_CONTROL, in ar9003_hw_spur_mitigate_mrc_cck()
252 REG_RMW_FIELD(ah, AR_PHY_AGC_CONTROL, in ar9003_hw_spur_mitigate_mrc_cck()
Dreg.h2133 #define AR_PHY_AGC_CONTROL (AR_SREV_9300_20_OR_LATER(ah) ? AR9003_PHY_AGC_CONTROL : AR9002_PHY_AG… macro