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Searched refs:BACKLIGHT_DUTY_CYCLE_MASK (Results 1 – 7 of 7) sorted by relevance

/drivers/gpu/drm/i915/
Dintel_panel.c488 return I915_READ(BLC_PWM_PCH_CTL2) & BACKLIGHT_DUTY_CYCLE_MASK; in bdw_get_backlight()
496 return I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; in pch_get_backlight()
506 val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; in i9xx_get_backlight()
524 return I915_READ(VLV_BLC_PWM_CTL(pipe)) & BACKLIGHT_DUTY_CYCLE_MASK; in _vlv_get_backlight()
557 u32 val = I915_READ(BLC_PWM_PCH_CTL2) & ~BACKLIGHT_DUTY_CYCLE_MASK; in bdw_set_backlight()
567 tmp = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK; in pch_set_backlight()
589 mask = BACKLIGHT_DUTY_CYCLE_MASK; in i9xx_set_backlight()
606 tmp = I915_READ(VLV_BLC_PWM_CTL(pipe)) & ~BACKLIGHT_DUTY_CYCLE_MASK; in vlv_set_backlight()
1249 if (cur_val & ~BACKLIGHT_DUTY_CYCLE_MASK) in vlv_setup_backlight()
1252 cur_val &= BACKLIGHT_DUTY_CYCLE_MASK; in vlv_setup_backlight()
Di915_reg.h3007 #define BACKLIGHT_DUTY_CYCLE_MASK (0xffff) macro
/drivers/gpu/drm/gma500/
Dpsb_intel_lvds.c202 blc_pwm_ctl &= ~BACKLIGHT_DUTY_CYCLE_MASK; in psb_intel_lvds_set_backlight()
211 ~BACKLIGHT_DUTY_CYCLE_MASK; in psb_intel_lvds_set_backlight()
286 BACKLIGHT_DUTY_CYCLE_MASK); in psb_intel_lvds_save()
449 BACKLIGHT_DUTY_CYCLE_MASK); in psb_intel_lvds_prepare()
Dcdv_intel_lvds.c183 REG_READ(BLC_PWM_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK; in cdv_intel_lvds_set_backlight()
190 ~BACKLIGHT_DUTY_CYCLE_MASK; in cdv_intel_lvds_set_backlight()
333 BACKLIGHT_DUTY_CYCLE_MASK); in cdv_intel_lvds_prepare()
Dcdv_device.c109 u32 val = REG_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; in cdv_get_brightness()
145 blc_pwm_ctl = REG_READ(BLC_PWM_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK; in cdv_set_brightness()
Doaktrail_lvds.c176 BACKLIGHT_DUTY_CYCLE_MASK); in oaktrail_lvds_prepare()
Dpsb_intel_reg.h116 #define BACKLIGHT_DUTY_CYCLE_MASK (0xffff) macro