/drivers/isdn/hisax/ |
D | hfc_2bs0.c | 27 while (!(cs->BC_Read_Reg(cs, HFC_STATUS, 0) & HFC_BUSY) && to) { in WaitForBusy() 28 val = cs->BC_Read_Reg(cs, HFC_DATA, HFC_CIP | HFC_F2 | in WaitForBusy() 45 while ((cs->BC_Read_Reg(cs, HFC_STATUS, 0) & HFC_BUSY) && to) { in WaitNoBusy() 76 val = 256 * bcs->cs->BC_Read_Reg(bcs->cs, HFC_DATA, reg | HFC_CIP | HFC_Z_HIGH); in ReadZReg() 78 val += bcs->cs->BC_Read_Reg(bcs->cs, HFC_DATA, reg | HFC_CIP | HFC_Z_LOW); in ReadZReg() 98 f1 = cs->BC_Read_Reg(cs, HFC_DATA, cip); in hfc_clear_fifo() 101 f2 = cs->BC_Read_Reg(cs, HFC_DATA, cip); in hfc_clear_fifo() 120 cs->BC_Read_Reg(cs, HFC_DATA_NODEB, cip); in hfc_clear_fifo() 125 cs->BC_Read_Reg(cs, HFC_DATA, HFC_CIP | HFC_F2_INC | HFC_REC | in hfc_clear_fifo() 131 f1 = cs->BC_Read_Reg(cs, HFC_DATA, cip); in hfc_clear_fifo() [all …]
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D | hscx.c | 30 verA = cs->BC_Read_Reg(cs, 0, HSCX_VSTR) & 0xf; in HscxVersion() 31 verB = cs->BC_Read_Reg(cs, 1, HSCX_VSTR) & 0xf; in HscxVersion() 222 val = cs->BC_Read_Reg(cs, 1, HSCX_ISTA); in clear_pending_hscx_ints() 225 eval = cs->BC_Read_Reg(cs, 1, HSCX_EXIR); in clear_pending_hscx_ints() 229 eval = cs->BC_Read_Reg(cs, 0, HSCX_EXIR); in clear_pending_hscx_ints() 232 val = cs->BC_Read_Reg(cs, 0, HSCX_ISTA); in clear_pending_hscx_ints() 234 val = cs->BC_Read_Reg(cs, 1, HSCX_STAR); in clear_pending_hscx_ints() 236 val = cs->BC_Read_Reg(cs, 0, HSCX_STAR); in clear_pending_hscx_ints()
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D | jade.c | 31 ver = cs->BC_Read_Reg(cs, -1, 0x60); in JadeVersion() 43 ver = cs->BC_Read_Reg(cs, -1, 0x60); in JadeVersion() 63 ret = cs->BC_Read_Reg(cs, -1, COMM_JADE); in jade_write_indirect() 261 val = cs->BC_Read_Reg(cs, 1, jade_HDLC_ISR); in clear_pending_jade_ints() 263 val = cs->BC_Read_Reg(cs, 0, jade_HDLC_ISR); in clear_pending_jade_ints() 265 val = cs->BC_Read_Reg(cs, 1, jade_HDLC_STAR); in clear_pending_jade_ints() 267 val = cs->BC_Read_Reg(cs, 0, jade_HDLC_STAR); in clear_pending_jade_ints()
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D | ipacx.c | 531 while (cnt--) *ptr++ = cs->BC_Read_Reg(cs, hscx, IPACX_RFIFOB); in bch_empty_fifo() 602 istab = cs->BC_Read_Reg(cs, hscx, IPACX_ISTAB); in bch_int() 609 rstab = cs->BC_Read_Reg(cs, hscx, IPACX_RSTAB); in bch_int() 623 count = cs->BC_Read_Reg(cs, hscx, IPACX_RBCLB) & (B_FIFO_SIZE - 1); in bch_int() 877 if (ista & 0x80) cs->BC_Read_Reg(cs, 0, IPACX_ISTAB); in clear_pending_ints() 878 if (ista & 0x40) cs->BC_Read_Reg(cs, 1, IPACX_ISTAB); in clear_pending_ints()
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D | w6692.c | 281 val = cs->BC_Read_Reg(cs, bchan, W_B_EXIR); in W6692B_interrupt() 289 r = cs->BC_Read_Reg(cs, bchan, W_B_STAR); in W6692B_interrupt() 302 count = cs->BC_Read_Reg(cs, bchan, W_B_RBCL) & (W_B_FIFO_THRESH - 1); in W6692B_interrupt() 322 r = cs->BC_Read_Reg(cs, bchan, W_B_STAR); in W6692B_interrupt() 361 r = cs->BC_Read_Reg(cs, bchan, W_B_STAR); in W6692B_interrupt() 1071 cs->BC_Read_Reg = &ReadW6692B; in setup_w6692()
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D | hfcscard.c | 30 (stat = cs->BC_Read_Reg(cs, HFCD_DATA, HFCD_STAT))) { in hfcs_interrupt() 31 val = cs->BC_Read_Reg(cs, HFCD_DATA, HFCD_INT_S1); in hfcs_interrupt()
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D | isar.c | 39 while ((cs->BC_Read_Reg(cs, 0, ISAR_HIA) & 1) && timeout) { in waitforHIA() 96 msg[0] = cs->BC_Read_Reg(cs, 1, ISAR_MBOX); in rcv_mbox() 98 msg[i] = cs->BC_Read_Reg(cs, 2, ISAR_MBOX); in rcv_mbox() 121 ireg->iis = cs->BC_Read_Reg(cs, 1, ISAR_IIS); in get_irq_infos() 122 ireg->cmsb = cs->BC_Read_Reg(cs, 1, ISAR_CTRL_H); in get_irq_infos() 123 ireg->clsb = cs->BC_Read_Reg(cs, 1, ISAR_CTRL_L); in get_irq_infos() 139 while ((!(cs->BC_Read_Reg(cs, 0, ISAR_IRQBIT) & ISAR_IRQSTA)) && in waitrecmsg()
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D | nj_u.c | 208 cs->BC_Read_Reg = &dummyrr; in nju_cs_init_rest()
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D | sportster.c | 254 cs->BC_Read_Reg = &ReadHSCX; in setup_sportster()
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D | mic.c | 222 cs->BC_Read_Reg = &ReadHSCX; in setup_mic()
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D | avm_a1p.c | 253 cs->BC_Read_Reg = &ReadHSCX; in setup_avm_a1_pcmcia()
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D | nj_s.c | 244 cs->BC_Read_Reg = &dummyrr; in njs_cs_init_rest()
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D | telespci.c | 335 cs->BC_Read_Reg = &ReadHSCX; in setup_telespci()
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D | enternow_pci.c | 374 cs->BC_Read_Reg = &dummyrr; in en_cs_init_rest()
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D | isurf.c | 294 cs->BC_Read_Reg = &ReadISAR; in setup_isurf()
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D | s0box.c | 247 cs->BC_Read_Reg = &ReadHSCX; in setup_s0box()
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D | bkm_a4t.c | 310 cs->BC_Read_Reg = &ReadJADE; in a4t_cs_init()
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D | saphir.c | 284 cs->BC_Read_Reg = &ReadHSCX; in setup_saphir()
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D | avm_a1.c | 293 cs->BC_Read_Reg = &ReadHSCX; in setup_avm_a1()
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D | ix1_micro.c | 303 cs->BC_Read_Reg = &ReadHSCX; in setup_ix1micro()
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D | teles0.c | 351 cs->BC_Read_Reg = &ReadHSCX; in setup_teles0()
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D | teleint.c | 329 cs->BC_Read_Reg = &ReadHFC; in setup_TeleInt()
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D | diva.c | 943 cs->BC_Read_Reg = &ReadHSCX; in setup_diva_common() 961 cs->BC_Read_Reg = &MemReadHSCX; in setup_diva_common() 972 cs->BC_Read_Reg = &MemReadHSCX_IPACX; in setup_diva_common()
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D | bkm_a8.c | 423 cs->BC_Read_Reg = &ReadHSCX; in setup_sct_quadro()
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D | niccy.c | 367 cs->BC_Read_Reg = &ReadHSCX; in setup_niccy()
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