| /drivers/staging/vt6655/ |
| D | 80211hdr.h | 51 #define BIT14 0x00004000 macro
167 #define WLAN_GET_FC_ISWEP(n) ((((unsigned short)(n) << 8) & (BIT14)) >> 14)
186 #define WLAN_GET_CAP_INFO_GRPACK(n) ((((n)) & BIT14) >> 14)
200 #define WLAN_GET_FC_ISWEP(n) ((((unsigned short)(n)) & (BIT14)) >> 14)
219 #define WLAN_GET_CAP_INFO_GRPACK(n) (((n) & BIT14) >> 14)
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| D | power.c | 77 unsigned short wAID = pMgmt->wCurrAID | BIT14 | BIT15; in PSvEnablePowerSaving()
244 pTxPacket->p80211Header->sA2.wDurationID = pMgmt->wCurrAID | BIT14 | BIT15; in PSvSendPSPOLL()
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| D | wmgr.c | 962 pMgmt->wCurrAID & ~(BIT14 | BIT15)); in s_vMgrRxAssocResponse()
2002 wAIDNumber = pMgmt->wCurrAID & ~(BIT14|BIT15); in s_vMgrRxBeacon()
3821 *sFrame.pwAid = cpu_to_le16((unsigned short)(wAssocAID | BIT14 | BIT15)); in s_MgrMakeAssocResponse()
3892 *sFrame.pwAid = cpu_to_le16((unsigned short)(wAssocAID | BIT14 | BIT15)); in s_MgrMakeReAssocResponse()
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| /drivers/staging/emxx_udc/ |
| D | emxx_udc.h | 101 #define BIT14 0x00004000 macro
156 #define UFRAME (BIT14+BIT13+BIT12)
185 #define EP6_INT BIT14
212 #define EP6_EN BIT14
253 #define EP0_OUT_NULL BIT14
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| /drivers/staging/rtl8192e/rtl8192e/ |
| D | r8192E_hw.h | 228 #define IMR_TIMEOUT0 BIT14
259 #define TPPoll_StopHigh BIT14
389 #define RRSR_MCS2 BIT14
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| /drivers/net/wireless/rtlwifi/btcoexist/ |
| D | halbt_precomp.h | 62 #define BIT14 0x00004000 macro
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| /drivers/staging/rtl8188eu/include/ |
| D | rtl8188e_spec.h | 40 #define BIT14 0x00004000 macro
565 #define RRSR_MCS2 BIT14
629 #define IMR_BCNDMAINT_E_88E BIT14 /* Beacon DMA Interrupt Extension for Win7 */
658 #define IMR_BCNDERR1_88E BIT14 /* Beacon DMA Error Int 1 */
717 #define RCR_HTC_LOC_CTRL BIT14 /* MFC<--HTC=1 MFC-->HTC=0 */
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| D | osdep_service.h | 121 #define BIT14 0x00004000 macro
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| /drivers/scsi/ |
| D | tmscsim.h | 178 #define BIT14 0x00004000 macro
221 #define SRB_UNEXPECT_RESEL BIT14
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| D | dc395x.h | 61 #define BIT14 0x00004000 macro
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| /drivers/staging/rtl8188eu/hal/ |
| D | odm_RTL8188E.c | 149 phy_set_bb_reg(adapter, 0x858, BIT15|BIT14, 2); in dm_fast_training_init()
212 BIT14|BIT13|BIT12, default_ant); in rtl88eu_dm_update_rx_idle_ant()
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| D | odm.c | 769 phy_set_bb_reg(adapter, ODM_REG_CCK_FA_RST_11N, BIT14, 1); in odm_FalseAlarmCounterStatistics()
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| /drivers/tty/ |
| D | synclink.c | 559 #define MISCSTATUS_RXC BIT14
579 #define SICR_RXC_INACTIVE BIT14
580 #define SICR_RXC (BIT15|BIT14)
1842 usc_OutReg(info, PCR, (u16)((usc_InReg(info, PCR) | BIT15) | BIT14)); in shutdown()
4717 RegValue |= BIT14; in usc_set_sdlc_mode()
4721 RegValue |= BIT15 | BIT14; in usc_set_sdlc_mode()
4761 case HDLC_ENCODING_NRZI_MARK: RegValue |= BIT14; break; in usc_set_sdlc_mode()
4762 case HDLC_ENCODING_NRZI_SPACE: RegValue |= BIT14 | BIT13; break; in usc_set_sdlc_mode()
4765 case HDLC_ENCODING_BIPHASE_LEVEL: RegValue |= BIT15 | BIT14; break; in usc_set_sdlc_mode()
4766 case HDLC_ENCODING_DIFF_BIPHASE_LEVEL: RegValue |= BIT15 | BIT14 | BIT13; break; in usc_set_sdlc_mode()
[all …]
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| D | synclink_gt.c | 384 #define MASK_BREAK BIT14
411 #define RXIDLE BIT14
412 #define RXBREAK BIT14
4018 wr_reg16(info, SCR, (unsigned short)(rd_reg16(info, SCR) & ~BIT14)); in rx_start()
4026 wr_reg16(info, SCR, (unsigned short)(rd_reg16(info, SCR) | BIT14)); in rx_start()
4253 val = BIT15 + BIT14 + BIT0; in async_mode()
4307 case MGSL_MODE_MONOSYNC: val |= BIT14 + BIT13; break; in sync_mode()
4382 case MGSL_MODE_MONOSYNC: val |= BIT14 + BIT13; break; in sync_mode()
4489 wr_reg16(info, SCR, BIT15 + BIT14 + BIT0); in sync_mode()
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| /drivers/staging/rtl8192u/ |
| D | r8192U_hw.h | 321 #define RRSR_MCS2 BIT14
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| D | r8192U.h | 62 #define BIT14 0x00004000 macro
110 #define COMP_DIG BIT14
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| /drivers/staging/rtl8192e/ |
| D | rtl819x_Qos.h | 38 #define BIT14 0x00004000 macro
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| /drivers/staging/rtl8192u/ieee80211/ |
| D | rtl819x_Qos.h | 18 #define BIT14 0x00004000 macro
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| /drivers/net/wireless/rtlwifi/rtl8192de/ |
| D | reg.h | 398 #define RRSR_MCS2 BIT14
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| /drivers/scsi/lpfc/ |
| D | lpfc_hw4.h | 688 #define LPFC_SLI4_INTR14 BIT14
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| /drivers/char/pcmcia/ |
| D | synclink_cs.c | 291 #define IRQ_DATAOVERRUN BIT14 // receive data overflow
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