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Searched refs:BIT18 (Results 1 – 15 of 15) sorted by relevance

/drivers/staging/emxx_udc/
Demxx_udc.h105 #define BIT18 0x00040000 macro
122 #define USBTESTMODE (BIT18+BIT17+BIT16)
126 #define TEST_PACKET BIT18
128 #define TEST_FORCE_ENABLE (BIT18+BIT16)
181 #define EP10_INT BIT18
208 #define EP10_EN BIT18
230 #define EP0_STGSEL BIT18
249 #define EP0_PID BIT18
338 #define EPn_OUT_NULL_INT BIT18 /* RW */
363 #define EPn_OUT_NULL_EN BIT18 /* RW */
/drivers/staging/rtl8192e/rtl8192e/
Dr8192E_hw.h145 BIT18 | BIT19 | BIT20 | BIT21 | BIT22 | BIT23)
156 #define RCR_ADF BIT18
393 #define RRSR_MCS6 BIT18
/drivers/staging/rtl8188eu/include/
Drtl8188e_spec.h44 #define BIT18 0x00040000 macro
569 #define RRSR_MCS6 BIT18
654 #define IMR_BCNDERR5_88E BIT18 /* Beacon DMA Error Int 5 */
1210 #define SDIO_HIMR_CPWM1_MSK BIT18
1236 #define SDIO_HISR_CPWM1 BIT18
1306 #define BT_FUNC_EN BIT18
Dosdep_service.h125 #define BIT18 0x00040000 macro
/drivers/net/wireless/rtlwifi/btcoexist/
Dhalbt_precomp.h66 #define BIT18 0x00040000 macro
/drivers/staging/rtl8192u/
Dr8192U_hw.h153 #define RCR_ADF BIT18 // Accept data type frame
325 #define RRSR_MCS6 BIT18
Dr8192U.h66 #define BIT18 0x00040000 macro
114 #define COMP_HIPWR BIT18 /* High Power Mechanism */
/drivers/scsi/
Dtmscsim.h174 #define BIT18 0x00040000 macro
484 #define SCAM BIT18
Ddc395x.h57 #define BIT18 0x00040000 macro
/drivers/staging/rtl8192e/
Drtl819x_Qos.h42 #define BIT18 0x00040000 macro
/drivers/staging/vt6655/
D80211hdr.h55 #define BIT18 0x00040000 macro
/drivers/staging/rtl8192u/ieee80211/
Drtl819x_Qos.h22 #define BIT18 0x00040000 macro
/drivers/staging/rtl8188eu/hal/
Dodm_RTL8188E.c150 phy_set_bb_reg(adapter, 0x878, BIT19|BIT18|BIT17, 3); in dm_fast_training_init()
/drivers/net/wireless/rtlwifi/rtl8192de/
Dreg.h402 #define RRSR_MCS6 BIT18
/drivers/scsi/lpfc/
Dlpfc_hw4.h692 #define LPFC_SLI4_INTR18 BIT18