Searched refs:BIT27 (Results 1 – 17 of 17) sorted by relevance
53 #define BIT27 0x08000000 macro622 #define IMR_GTINT3_88E BIT27 /* When GTIMER3 expires, this bit is set to 1 */645 #define IMR_BCNDMAINT7_88E BIT27 /* Beacon DMA Interrupt 7 */713 #define RCR_APP_BA_SSN BIT27 /* Accept BA SSN */1219 #define SDIO_HIMR_CTWEND_MSK BIT271245 #define SDIO_HISR_CTWEND BIT27
134 #define BIT27 0x08000000 macro
75 #define BIT27 0x08000000 macro
149 #define RCR_ENMBID BIT27225 #define IMR_TBDOK BIT27
28 #define ISR_TxBcnOk BIT27
12 #define ISR_TxBcnOk BIT27 /* Transmit Beacon OK */
146 #define RCR_ENMBID BIT27 // Enable Multiple BssId.
75 #define BIT27 0x08000000 macro126 #define COMP_SCAN BIT27
114 #define BIT27 0x08000000 macro329 #define EPn_OUT_NOTKN BIT27 /* R */
48 #define BIT27 0x08000000 macro
165 #define BIT27 0x08000000 macro
51 #define BIT27 0x08000000 macro
64 #define BIT27 0x08000000 macro
31 #define BIT27 0x08000000 macro
153 phy_set_bb_reg(adapter, 0x878, BIT28|BIT27|BIT26, 6); in dm_fast_training_init()
299 phy_set_bb_reg(adapt, 0x818, (BIT26 | BIT27), in phy_set_bw_mode_callback()849 if (!(reg_eac & BIT27) && /* if Tx is OK, check whether Rx is OK */ in phy_path_a_rx_iqk()
701 #define LPFC_SLI4_INTR27 BIT27