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/drivers/media/pci/cx18/
Dcx18-mailbox.c50 API_ENTRY(CPU, CX18_CPU_SET_CHANNEL_TYPE, 0),
51 API_ENTRY(CPU, CX18_EPU_DEBUG, 0),
52 API_ENTRY(CPU, CX18_CREATE_TASK, 0),
53 API_ENTRY(CPU, CX18_DESTROY_TASK, 0),
54 API_ENTRY(CPU, CX18_CPU_CAPTURE_START, API_SLOW),
55 API_ENTRY(CPU, CX18_CPU_CAPTURE_STOP, API_SLOW),
56 API_ENTRY(CPU, CX18_CPU_CAPTURE_PAUSE, 0),
57 API_ENTRY(CPU, CX18_CPU_CAPTURE_RESUME, 0),
58 API_ENTRY(CPU, CX18_CPU_SET_CHANNEL_TYPE, 0),
59 API_ENTRY(CPU, CX18_CPU_SET_STREAM_OUTPUT_TYPE, 0),
[all …]
Dcx18-mailbox.h35 #define CPU 1 macro
Dcx18-irq.c40 cx18_api_epu_cmd_irq(cx, CPU); in epu_cmd()
/drivers/cpufreq/
DKconfig1 menu "CPU Frequency scaling"
4 bool "CPU Frequency scaling"
6 CPU Frequency scaling allows you to change the clock speed of
8 the lower the CPU clock speed, the less power the CPU consumes.
10 Note that this driver doesn't automatically change the CPU
28 tristate "CPU frequency translation statistics"
31 This driver exports CPU frequency statistics information through sysfs
40 bool "CPU frequency translation statistics details"
43 This will show detail CPU frequency translation table in sysfs file
62 the CPU.
[all …]
DKconfig.arm2 # ARM CPU Frequency scaling drivers
172 CPU Frequency scaling support for S3C2410
180 CPU Frequency scaling support for S3C2412 and S3C2413 SoC CPUs.
183 bool "S3C2416 CPU Frequency scaling support"
190 core voltage of the CPU.
198 Enable CPU voltage scaling when entering the dvs mode.
205 bool "S3C2440/S3C2442 CPU Frequency scaling support"
210 CPU Frequency scaling support for S3C2440 and S3C2442 SoC CPUs.
DKconfig.powerpc27 tristate "CPU frequency scaling driver for Freescale E500MC SoCs"
33 the CPU's frequency dynamically.
59 tristate "CPU frequency scaling for IBM POWERNV platform"
63 This adds support for CPU frequency switching on IBM POWERNV
DKconfig.x862 # x86 CPU Frequency scaling drivers
136 the CPUs' workloads are. CPU-bound workloads will be more sensitive
212 processors. When enabled it will lower CPU temperature by skipping
266 does not have any safeguards to prevent operating the CPU out of spec
/drivers/cpuidle/
DKconfig.arm2 # ARM CPU Idle drivers
12 Select this option to enable CPU idle driver for big.LITTLE based
15 multiple CPU idle drivers infrastructure.
18 bool "CPU Idle Driver for CLPS711X processors"
24 bool "CPU Idle Driver for Calxeda processors"
31 bool "CPU Idle Driver for Marvell Kirkwood SoCs"
34 This adds the CPU Idle driver for Marvell Kirkwood SoCs.
37 bool "CPU Idle Driver for Xilinx Zynq processors"
62 bool "CPU Idle Driver for mvebu v7 family processors"
DKconfig1 menu "CPU Idle"
4 bool "CPU idle PM support"
9 CPU idle is a generic framework for supporting software-controlled
31 menu "ARM CPU Idle Drivers"
36 menu "ARM64 CPU Idle Drivers"
41 menu "MIPS CPU Idle Drivers"
46 menu "POWERPC CPU Idle Drivers"
DKconfig.arm642 # ARM64 CPU Idle drivers
6 bool "Generic ARM64 CPU idle Driver"
13 initialized by calling the CPU operations init idle hook
DKconfig.mips2 # MIPS CPU Idle Drivers
5 bool "CPU Idle driver for MIPS CPS platforms"
DKconfig.powerpc2 # POWERPC CPU Idle Drivers
/drivers/clk/mxs/
Dclk-imx23.c30 #define CPU (CLKCTRL + 0x0020) macro
56 writel_relaxed(1 << BP_CPU_INTERRUPT_WAIT, CPU + SET); in clk_misc_init()
132 clks[cpu_pll] = mxs_clk_div("cpu_pll", "ref_cpu", CPU, 0, 6, 28); in mx23_clocks_init()
133 clks[cpu_xtal] = mxs_clk_div("cpu_xtal", "ref_xtal", CPU, 16, 10, 29); in mx23_clocks_init()
Dclk-imx28.c29 #define CPU (CLKCTRL + 0x0050) macro
90 writel_relaxed(1 << BP_CPU_INTERRUPT_WAIT, CPU + SET); in clk_misc_init()
196 clks[cpu_pll] = mxs_clk_div("cpu_pll", "ref_cpu", CPU, 0, 6, 28); in mx28_clocks_init()
197 clks[cpu_xtal] = mxs_clk_div("cpu_xtal", "ref_xtal", CPU, 16, 10, 29); in mx28_clocks_init()
/drivers/thermal/
DKconfig196 bound cpufreq cooling device turns active to set CPU frequency low to
197 cool down the CPU.
215 Enable this to register CPU digital sensor for package temperature as
226 addition to DTSs on CPU cores. Each DTS will be registered as a
241 CPU/SOC, for thermal safety reasons.
/drivers/usb/dwc2/
DKconfig12 controllers directly connected to the CPU) will be called
36 controllers directly connected to the CPU. This is only
/drivers/misc/cxl/
DKconfig19 coherently attached to a CPU via an MMU. This driver enables
/drivers/leds/trigger/
DKconfig48 This allows LEDs to be controlled by a CPU load average.
63 bool "LED CPU Trigger"
/drivers/thermal/samsung/
DKconfig18 CPU cooling APIs.
/drivers/sh/intc/
DKconfig28 SMP parts. All of the balancing and CPU wakeup decisions are
/drivers/powercap/
DKconfig29 controller, CPU core (Power Plance 0), graphics uncore (Power Plane
/drivers/usb/gadget/
DKconfig28 or are integrated with the CPU in a microcontroller. The more
121 for a bursty VFS behaviour. For instance there may be CPU wake up
123 an CPU on-demand governor. Especially if DMA is doing IO to
124 offload the CPU. In this case the CPU will go into power
/drivers/net/can/softing/
DKconfig9 with the host CPU. The interface is then identical for PCI
/drivers/mtd/chips/
DKconfig47 This option defines the way in which the CPU attempts to arrange
50 enabled, means that the CPU will not do any swapping; the chips
51 are expected to be wired to the CPU in 'host-endian' form.
/drivers/net/ethernet/myricom/
DKconfig43 driver. DCA is a method for warming the CPU cache before data

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