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Searched refs:CSR0 (Results 1 – 18 of 18) sorted by relevance

/drivers/net/wan/
Dsbni.c357 outb( 0, ioaddr + CSR0 ); in sbni_probe1()
363 outb( EN_INT | TR_REQ, ioaddr + CSR0 ); in sbni_probe1()
367 outb( 0, ioaddr + CSR0 ); in sbni_probe1()
409 if( inb( ioaddr + CSR0 ) & 0x01 ) in sbni_probe1()
515 if( inb( dev->base_addr + CSR0 ) & (RC_RDY | TR_RDY) ) in sbni_interrupt()
519 (inb( nl->second->base_addr+CSR0 ) & (RC_RDY | TR_RDY)) ) in sbni_interrupt()
546 outb( (inb( ioaddr + CSR0 ) & ~EN_INT) | TR_REQ, ioaddr + CSR0 ); in handle_channel()
550 csr0 = inb( ioaddr + CSR0 ); in handle_channel()
563 csr0 = inb( ioaddr + CSR0 ); in handle_channel()
572 outb( inb( ioaddr + CSR0 ) & ~TR_REQ, ioaddr + CSR0 ); in handle_channel()
[all …]
Dsbni.h26 CSR0 = 0, enumerator
/drivers/net/ethernet/amd/
Dsun3lance.c202 #define CSR0 0 /* mode/status */ macro
331 ioaddr_probe[1] = CSR0; in lance_probe()
359 REGA(CSR0) = CSR0_STOP; in lance_probe()
424 REGA(CSR0) = CSR0_STOP; in lance_open()
429 REGA(CSR0) = CSR0_INIT; in lance_open()
559 REGA( CSR0 ) = CSR0_INEA | CSR0_INIT | CSR0_STRT; in lance_start_xmit()
581 AREG = CSR0; in lance_start_xmit()
589 REGA( CSR0 ) = CSR0_STOP; in lance_start_xmit()
591 REGA( CSR0 ) = CSR0_INIT | CSR0_STRT; in lance_start_xmit()
635 REGA(CSR0) = CSR0_INEA | CSR0_TDMD | CSR0_STRT; in lance_start_xmit()
[all …]
Dariadne.c247 lance->RAP = CSR0; /* PCnet-ISA Controller Status */ in ariadne_interrupt()
382 lance->RAP = CSR0; /* PCnet-ISA Controller Status */ in ariadne_interrupt()
403 lance->RAP = CSR0; /* PCnet-ISA Controller Status */ in ariadne_open()
491 lance->RAP = CSR0; /* PCnet-ISA Controller Status */ in ariadne_open()
505 lance->RAP = CSR0; /* PCnet-ISA Controller Status */ in ariadne_close()
526 lance->RAP = CSR0; /* PCnet-ISA Controller Status */ in ariadne_reset()
554 lance->RAP = CSR0; /* PCnet-ISA Controller Status */ in ariadne_start_xmit()
609 lance->RAP = CSR0; /* PCnet-ISA Controller Status */ in ariadne_start_xmit()
653 lance->RAP = CSR0; /* PCnet-ISA Controller Status */ in set_multicast_list()
678 lance->RAP = CSR0; /* PCnet-ISA Controller Status */ in set_multicast_list()
Dam79c961a.c247 …write_rreg (dev->base_addr, CSR0, CSR0_BABL|CSR0_CERR|CSR0_MISS|CSR0_MERR|CSR0_TINT|CSR0_RINT|CSR0… in am79c961_init_for_open()
299 write_rreg (dev->base_addr, CSR0, CSR0_STOP); in am79c961_init_for_open()
302 write_rreg (dev->base_addr, CSR0, CSR0_IENA|CSR0_STRT); in am79c961_init_for_open()
368 write_rreg (dev->base_addr, CSR0, CSR0_STOP); in am79c961_close()
389 stopped = read_rreg(dev->base_addr, CSR0) & CSR0_STOP; in am79c961_setmulticastlist()
464 write_rreg (dev->base_addr, CSR0, CSR0_TDMD|CSR0_IENA); in am79c961_sendpacket()
596 status = read_rreg(dev->base_addr, CSR0); in am79c961_interrupt()
597 write_rreg(dev->base_addr, CSR0, status & in am79c961_interrupt()
642 write_rreg (dev->base_addr, CSR0, CSR0_STOP); in am79c961_hw_init()
Dpcnet32.c196 #define CSR0 0 macro
797 lp->a->write_csr(ioaddr, CSR0, CSR0_STOP); /* stop the chip */ in pcnet32_set_ringparam()
893 lp->a->write_csr(ioaddr, CSR0, CSR0_STOP); /* stop the chip */ in pcnet32_loopback_test()
907 lp->a->write_csr(ioaddr, CSR0, CSR0_STOP); /* Set STOP bit */ in pcnet32_loopback_test()
961 lp->a->write_csr(ioaddr, CSR0, CSR0_START); /* Set STRT bit */ in pcnet32_loopback_test()
980 lp->a->write_csr(ioaddr, CSR0, CSR0_STOP); /* Set STOP bit */ in pcnet32_loopback_test()
1364 lp->a->write_csr(ioaddr, CSR0, CSR0_INTEN); in pcnet32_poll()
1393 csr0 = a->read_csr(ioaddr, CSR0); in pcnet32_get_regs()
1872 a->write_csr(ioaddr, CSR0, CSR0_INTEN | CSR0_INIT); in pcnet32_probe1()
2218 lp->a->write_csr(ioaddr, CSR0, CSR0_INIT); in pcnet32_open()
[all …]
Datarilance.c303 #define CSR0 0 /* mode/status */ macro
509 ioaddr[1] = CSR0; in lance_probe1()
538 REGA( CSR0 ) = CSR0_STOP; in lance_probe1()
655 REGA( CSR0 ) = CSR0_INIT; in lance_open()
735 AREG = CSR0; in lance_tx_timeout()
766 REGA( CSR0 ) = CSR0_INEA | CSR0_INIT | CSR0_STRT; in lance_tx_timeout()
866 AREG = CSR0; in lance_interrupt()
1055 AREG = CSR0; in lance_close()
1111 REGA( CSR0 ) = CSR0_IDON | CSR0_INEA | CSR0_STRT; in set_multicast_list()
Dni65.c150 #define CSR0 0x00 macro
166 #define writedatareg(val) { writereg(val,CSR0); }
171 #define writedatareg(val) { writereg(val,CSR0); }
273 writereg(CSR0_STOP | CSR0_CLRALL,CSR0); /* STOP */ in ni65_set_performance()
288 outw(CSR0,PORT+L_ADDRREG); /* switch back to CSR0 */ in ni65_set_performance()
464 if( (j=readreg(CSR0)) != 0x4) { in ni65_probe1()
516 if(readreg(CSR0) & CSR0_IDON) in ni65_probe1()
538 writereg(CSR0_INIT|CSR0_INEA,CSR0); /* trigger interrupt */ in ni65_probe1()
577 writereg(CSR0_CLRALL|CSR0_STOP,CSR0); in ni65_init_lance()
593 writereg(CSR0_INIT,CSR0); /* this changes L_ADDRREG to CSR0 */ in ni65_init_lance()
[all …]
Dam79c961a.h30 #define CSR0 0 macro
Dariadne.h62 #define CSR0 0x0000 /* - PCnet-ISA Controller Status */ macro
/drivers/net/ethernet/dec/tulip/
Dxircom_cb.c48 #define CSR0 0x00 macro
507 val = xr32(CSR0); in initialize_card()
509 xw32(CSR0, val); in initialize_card()
513 val = xr32(CSR0); in initialize_card()
515 xw32(CSR0, val); in initialize_card()
520 xw32(CSR0, val); in initialize_card()
Dtulip.h106 CSR0 = 0, enumerator
Dtulip_core.c318 iowrite32(0x00000001, ioaddr + CSR0); in tulip_up()
325 iowrite32(tp->csr0, ioaddr + CSR0); in tulip_up()
498 ioread32(ioaddr + CSR0), in tulip_up()
/drivers/spi/
Dspi-atmel.c296 spi_writel(as, CSR0 + 4 * spi->chip_select, asd->csr); in cs_activate()
300 spi_writel(as, CSR0, asd->csr); in cs_activate()
323 csr = spi_readl(as, CSR0 + 4 * i); in cs_activate()
325 spi_writel(as, CSR0 + 4 * i, in cs_activate()
719 csr = spi_readl(as, CSR0 + 4 * spi->chip_select); in atmel_spi_set_xfer_speed()
721 spi_writel(as, CSR0 + 4 * spi->chip_select, csr); in atmel_spi_set_xfer_speed()
1044 spi_writel(as, CSR0 + 4 * spi->chip_select, csr); in atmel_spi_setup()
/drivers/net/wireless/rt2x00/
Drt2400pci.h65 #define CSR0 0x0000 macro
Drt2500pci.h76 #define CSR0 0x0000 macro
Drt2400pci.c1491 rt2x00mmio_register_read(rt2x00dev, CSR0, &reg); in rt2400pci_init_eeprom()
Drt2500pci.c1645 rt2x00mmio_register_read(rt2x00dev, CSR0, &reg); in rt2500pci_init_eeprom()