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Searched refs:ChlWidth (Results 1 – 7 of 7) sorted by relevance

/drivers/staging/rtl8192e/
Drtl819x_HTProc.c136 (pCapELE->ChlWidth) ? "20MHz" : "20/40MHz"); in HTDebugHTCapability()
227 else if (((struct ht_capab_ele *)(pHTInfo->PeerHTCapBuf))->ChlWidth) in IsHTHalfNmode40Bandwidth()
472 pCapELE->ChlWidth = 0; in HTConstructCapabilityElement()
474 pCapELE->ChlWidth = (pHT->bRegBW40MHz ? 1 : 0); in HTConstructCapabilityElement()
491 "DssCCk:%d\n", pCapELE->ChlWidth, pCapELE->MaxAMSDUSize, in HTConstructCapabilityElement()
522 pCapELE->ChlWidth = 0; in HTConstructCapabilityElement()
719 HTSetConnectBwMode(ieee, (enum ht_channel_width)(pPeerHTCap->ChlWidth), in HTOnAssocRsp()
Drtl819x_HT.h141 u8 ChlWidth:1; member
Drtllib_wx.c168 is40M = (ht_cap->ChlWidth) ? 1 : 0; in rtl819x_translate_scan()
169 isShortGI = (ht_cap->ChlWidth) ? in rtl819x_translate_scan()
Drtllib_rx.c2136 (network->bssht.bdHTCapBuf))->ChlWidth); in rtllib_parse_info_param()
/drivers/staging/rtl8192u/ieee80211/
Drtl819x_HTProc.c140 …IEEE80211_DEBUG(IEEE80211_DL_HT, "\tSupported Channel Width = %s\n", (pCapELE->ChlWidth)?"20MHz":… in HTDebugHTCapability()
233 else if(((PHT_CAPABILITY_ELE)(pHTInfo->PeerHTCapBuf))->ChlWidth) // ap support 40 bw in IsHTHalfNmode40Bandwidth()
578 pCapELE->ChlWidth = 0; in HTConstructCapabilityElement()
582 pCapELE->ChlWidth = (pHT->bRegBW40MHz?1:0); in HTConstructCapabilityElement()
603 …DL_HT, "TX HT cap/info ele BW=%d MaxAMSDUSize:%d DssCCk:%d\n", pCapELE->ChlWidth, pCapELE->MaxAMSD… in HTConstructCapabilityElement()
984 …HTSetConnectBwMode(ieee, (HT_CHANNEL_WIDTH)(pPeerHTCap->ChlWidth), (HT_EXTCHNL_OFFSET)(pPeerHTInfo… in HTOnAssocRsp()
Drtl819x_HT.h148 u8 ChlWidth:1; member
Dieee80211_wx.c157 is40M = (ht_cap->ChlWidth)?1:0; in rtl819x_translate_scan()
158 isShortGI = (ht_cap->ChlWidth)? in rtl819x_translate_scan()