Searched refs:DPLL (Results 1 – 5 of 5) sorted by relevance
| /drivers/gpu/drm/i915/ |
| D | intel_dsi.c | 181 tmp = I915_READ(DPLL(pipe)); in intel_dsi_pre_enable()
183 I915_WRITE(DPLL(pipe), tmp); in intel_dsi_pre_enable()
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| D | intel_display.c | 1060 reg = DPLL(pipe); in assert_pll()
1540 int reg = DPLL(crtc->pipe); in vlv_enable_pll()
1599 I915_WRITE(DPLL(pipe), crtc->config.dpll_hw_state.dpll); in chv_enable_pll()
1602 if (wait_for(((I915_READ(DPLL(pipe)) & DPLL_LOCK_VLV) == DPLL_LOCK_VLV), 1)) in chv_enable_pll()
1628 int reg = DPLL(crtc->pipe); in i9xx_enable_pll()
1649 I915_WRITE(DPLL(!crtc->pipe), in i9xx_enable_pll()
1650 I915_READ(DPLL(!crtc->pipe)) | DPLL_DVO_2X_MODE); in i9xx_enable_pll()
1702 I915_WRITE(DPLL(PIPE_B), in i9xx_disable_pll()
1703 I915_READ(DPLL(PIPE_B)) & ~DPLL_DVO_2X_MODE); in i9xx_disable_pll()
1704 I915_WRITE(DPLL(PIPE_A), in i9xx_disable_pll()
[all …]
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| D | intel_pm.c | 6346 I915_WRITE(DPLL(PIPE_B), I915_READ(DPLL(PIPE_B)) | in vlv_dpio_cmn_power_well_enable()
6397 I915_WRITE(DPLL(PIPE_B), I915_READ(DPLL(PIPE_B)) | in chv_dpio_cmn_power_well_enable()
6399 I915_WRITE(DPLL(PIPE_B), I915_READ(DPLL(PIPE_B)) | in chv_dpio_cmn_power_well_enable()
6403 I915_WRITE(DPLL(PIPE_C), I915_READ(DPLL(PIPE_C)) | in chv_dpio_cmn_power_well_enable()
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| D | i915_reg.h | 1689 #define DPLL(pipe) _PIPE3((pipe), _DPLL_A, _DPLL_B, _CHV_DPLL_C) macro
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| /drivers/net/wireless/rtlwifi/rtl8192se/ |
| D | reg.h | 281 #define DPLL 0x034A macro
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