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Searched refs:DSPADDR (Results 1 – 3 of 3) sorted by relevance

/drivers/gpu/drm/i915/
Di915_reg.h4261 #define DSPADDR(plane) _PIPE2(plane, _DSPAADDR) macro
4267 #define DSPLINOFF(plane) DSPADDR(plane)
Dintel_display.c2143 u32 reg = INTEL_INFO(dev)->gen >= 4 ? DSPSURF(plane) : DSPADDR(plane); in intel_flush_primary_plane()
2471 I915_WRITE(DSPADDR(plane), 0); in i9xx_update_primary_plane()
2574 I915_WRITE(DSPADDR(plane), i915_gem_obj_ggtt_offset(obj) + linear_offset); in i9xx_update_primary_plane()
6380 base = I915_READ(DSPADDR(plane)); in i9xx_get_plane_config()
9900 addr = I915_READ(DSPADDR(intel_crtc->plane)); in __intel_pageflip_stall_check()
13703 error->plane[i].addr = I915_READ(DSPADDR(i)); in intel_display_capture_error_state()
Di915_debugfs.c571 addr = I915_READ(DSPADDR(crtc->plane)); in i915_gem_pageflip_info()