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Searched refs:DSPFW2 (Results 1 – 8 of 8) sorted by relevance

/drivers/gpu/drm/gma500/
Dpsb_device.c190 regs->saveDSPFW2 = PSB_RVDC32(DSPFW2); in psb_save_display_registers()
228 PSB_WVDC32(regs->saveDSPFW2, DSPFW2); in psb_restore_display_registers()
Dcdv_intel_display.c514 fw = REG_READ(DSPFW2); in cdv_update_wm()
519 REG_WRITE(DSPFW2, fw); in cdv_update_wm()
550 REG_WRITE(DSPFW2, 0x0b020202); in cdv_update_wm()
Doaktrail_device.c200 regs->psb.saveDSPFW2 = PSB_RVDC32(DSPFW2); in oaktrail_save_display_registers()
314 PSB_WVDC32(regs->psb.saveDSPFW2, DSPFW2); in oaktrail_restore_display_registers()
Dcdv_device.c279 regs->cdv.saveDSPFW[1] = REG_READ(DSPFW2); in cdv_save_display_registers()
349 REG_WRITE(DSPFW2, regs->cdv.saveDSPFW[1]); in cdv_restore_display_registers()
Dpsb_intel_reg.h619 #define DSPFW2 0x70038 macro
Doaktrail_crtc.c338 REG_WRITE(DSPFW2, 0x04040f04); in oaktrail_crtc_dpms()
/drivers/gpu/drm/i915/
Dintel_pm.c1441 I915_WRITE(DSPFW2, in valleyview_update_wm()
1442 (I915_READ(DSPFW2) & ~DSPFW_CURSORA_MASK) | in valleyview_update_wm()
1515 I915_WRITE(DSPFW2, in cherryview_update_wm()
1516 (I915_READ(DSPFW2) & ~DSPFW_CURSORA_MASK) | in cherryview_update_wm()
1608 I915_WRITE(DSPFW2, in g4x_update_wm()
1609 (I915_READ(DSPFW2) & ~DSPFW_CURSORA_MASK) | in g4x_update_wm()
1684 I915_WRITE(DSPFW2, (8 << DSPFW_CURSORA_SHIFT) | in i965_update_wm()
Di915_reg.h3912 #define DSPFW2 (dev_priv->info.display_mmio_offset + 0x70038) macro