Searched refs:GRPH_PFLIP_INT_CLEAR (Results 1 – 6 of 6) sorted by relevance
/drivers/gpu/drm/radeon/ |
D | evergreen.c | 4627 WREG32(GRPH_INT_STATUS + EVERGREEN_CRTC0_REGISTER_OFFSET, GRPH_PFLIP_INT_CLEAR); in evergreen_irq_ack() 4629 WREG32(GRPH_INT_STATUS + EVERGREEN_CRTC1_REGISTER_OFFSET, GRPH_PFLIP_INT_CLEAR); in evergreen_irq_ack() 4641 WREG32(GRPH_INT_STATUS + EVERGREEN_CRTC2_REGISTER_OFFSET, GRPH_PFLIP_INT_CLEAR); in evergreen_irq_ack() 4643 WREG32(GRPH_INT_STATUS + EVERGREEN_CRTC3_REGISTER_OFFSET, GRPH_PFLIP_INT_CLEAR); in evergreen_irq_ack() 4656 WREG32(GRPH_INT_STATUS + EVERGREEN_CRTC4_REGISTER_OFFSET, GRPH_PFLIP_INT_CLEAR); in evergreen_irq_ack() 4658 WREG32(GRPH_INT_STATUS + EVERGREEN_CRTC5_REGISTER_OFFSET, GRPH_PFLIP_INT_CLEAR); in evergreen_irq_ack()
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D | si.c | 6226 WREG32(GRPH_INT_STATUS + EVERGREEN_CRTC0_REGISTER_OFFSET, GRPH_PFLIP_INT_CLEAR); in si_irq_ack() 6228 WREG32(GRPH_INT_STATUS + EVERGREEN_CRTC1_REGISTER_OFFSET, GRPH_PFLIP_INT_CLEAR); in si_irq_ack() 6240 WREG32(GRPH_INT_STATUS + EVERGREEN_CRTC2_REGISTER_OFFSET, GRPH_PFLIP_INT_CLEAR); in si_irq_ack() 6242 WREG32(GRPH_INT_STATUS + EVERGREEN_CRTC3_REGISTER_OFFSET, GRPH_PFLIP_INT_CLEAR); in si_irq_ack() 6255 WREG32(GRPH_INT_STATUS + EVERGREEN_CRTC4_REGISTER_OFFSET, GRPH_PFLIP_INT_CLEAR); in si_irq_ack() 6257 WREG32(GRPH_INT_STATUS + EVERGREEN_CRTC5_REGISTER_OFFSET, GRPH_PFLIP_INT_CLEAR); in si_irq_ack()
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D | sid.h | 820 # define GRPH_PFLIP_INT_CLEAR (1 << 8) macro
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D | cikd.h | 895 # define GRPH_PFLIP_INT_CLEAR (1 << 8) macro
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D | cik.c | 7638 GRPH_PFLIP_INT_CLEAR); in cik_irq_ack() 7641 GRPH_PFLIP_INT_CLEAR); in cik_irq_ack() 7654 GRPH_PFLIP_INT_CLEAR); in cik_irq_ack() 7657 GRPH_PFLIP_INT_CLEAR); in cik_irq_ack() 7671 GRPH_PFLIP_INT_CLEAR); in cik_irq_ack() 7674 GRPH_PFLIP_INT_CLEAR); in cik_irq_ack()
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D | evergreend.h | 1317 # define GRPH_PFLIP_INT_CLEAR (1 << 8) macro
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