Searched refs:I915_READ16 (Results 1 – 7 of 7) sorted by relevance
197 if (I915_READ16(C0DRB3) != I915_READ16(C1DRB3)) { in i915_gem_detect_bit_6_swizzle()
1030 u16 rgvswctl = I915_READ16(MEMSWCTL); in i915_frequency_info()1031 u16 rgvstat = I915_READ16(MEMSTAT_ILK); in i915_frequency_info()1186 crstandvid = I915_READ16(CRSTANDVID); in ironlake_drpc_info()1978 I915_READ16(C0DRB3)); in i915_swizzle_info()1980 I915_READ16(C1DRB3)); in i915_swizzle_info()
4041 if (I915_READ16(ISR) & flip_pending) in i8xx_handle_vblank()4068 iir = I915_READ16(IIR); in i8xx_irq_handler()4097 new_iir = I915_READ16(IIR); /* Flush posted writes */ in i8xx_irq_handler()4139 I915_WRITE16(IIR, I915_READ16(IIR)); in i8xx_irq_uninstall()
1001 reg->val = I915_READ16(reg->offset); in i915_reg_read_ioctl()
707 ddrpll = I915_READ16(DDRMPLL1); in i915_ironlake_get_mem_freq()708 csipll = I915_READ16(CSIPLL0); in i915_ironlake_get_mem_freq()3122 rgvswctl = I915_READ16(MEMSWCTL); in ironlake_set_drps()3214 rgvswctl = I915_READ16(MEMSWCTL); in ironlake_disable_drps()
1219 error->ier = I915_READ16(IER); in i915_capture_reg_state()
2882 #define I915_READ16(reg) dev_priv->uncore.funcs.mmio_readw(dev_priv, (reg), true) macro