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Searched refs:LCD_SPU_GZM_HPXL_VLN (Results 1 – 5 of 5) sorted by relevance

/drivers/gpu/drm/armada/
Darmada_hw.h39 LCD_SPU_GZM_HPXL_VLN = 0x0108, enumerator
Darmada_crtc.c582 armada_reg_queue_set(regs, i, val, LCD_SPU_GZM_HPXL_VLN); in armada_drm_crtc_mode_set()
/drivers/video/fbdev/
Dpxa168fb.h56 #define LCD_SPU_GZM_HPXL_VLN 0x0108 macro
Dpxa168fb.c455 fbi->reg_base + LCD_SPU_GZM_HPXL_VLN); in pxa168fb_set_par()
/drivers/video/fbdev/mmp/hw/
Dmmp_ctrl.h244 #define LCD_SPU_GZM_HPXL_VLN 0x0108 macro