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Searched refs:MD2 (Results 1 – 6 of 6) sorted by relevance

/drivers/net/wan/
Dhd64572.c374 u8 md2 = sca_in(msci + MD2, card); in sca_set_port()
419 sca_out(md2, msci + MD2, card); in sca_set_port()
453 sca_out(md2, msci + MD2, card); in sca_open()
549 sca_in(get_msci(port) + MD2, card), in sca_dump_rings()
Dhd64570.c411 u8 md2 = sca_in(msci + MD2, card); in sca_set_port()
455 sca_out(md2, msci + MD2, card); in sca_set_port()
489 sca_out(md2, msci + MD2, card); in sca_open()
601 sca_in(get_msci(port) + MD2, card), in sca_dump_rings()
Dhd64570.h61 #define MD2 0x10 /* Mode 2 */ macro
Dhd64572.h67 #define MD2 0x13a /* Mode reg 2 */ macro
/drivers/media/dvb-frontends/
Dtda18271c2dd.c76 MPD, MD1, MD2, MD3, enumerator
357 state->m_Regs[MD2] = ((MainDiv >> 8) & 0xFF); in CalcMainPLL()
802 state->m_Regs[MD2] = 0x08; in FixedContentsI2CUpdate()
845 state->m_Regs[MD2] = 0x1A; in FixedContentsI2CUpdate()
876 state->m_Regs[MD2] = 0xCD; in FixedContentsI2CUpdate()
/drivers/tty/
Dsynclinkmp.c325 #define MD2 0x30 macro
4035 write_reg(info, MD2, (unsigned char)(read_reg(info, MD2) | (BIT1 + BIT0))); in enable_loopback()
4053 write_reg(info, MD2, (unsigned char)(read_reg(info, MD2) & ~(BIT1 + BIT0))); in enable_loopback()
4437 write_reg(info, MD2, RegValue); in async_mode()
4599 write_reg(info, MD2, RegValue); in hdlc_mode()