Searched refs:PCH_DPLL_SEL (Results 1 – 2 of 2) sorted by relevance
3689 temp = I915_READ(PCH_DPLL_SEL); in ironlake_pch_enable()3696 I915_WRITE(PCH_DPLL_SEL, temp); in ironlake_pch_enable()4347 temp = I915_READ(PCH_DPLL_SEL); in ironlake_crtc_disable()4349 I915_WRITE(PCH_DPLL_SEL, temp); in ironlake_crtc_disable()7497 tmp = I915_READ(PCH_DPLL_SEL); in ironlake_get_pipe_config()
5047 #define PCH_DPLL_SEL 0xc7000 macro