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Searched refs:PIPE_VBLANK_INTERRUPT_STATUS (Results 1 – 4 of 4) sorted by relevance

/drivers/gpu/drm/gma500/
Dpsb_intel_reg.h527 #define PIPE_VBLANK_INTERRUPT_STATUS (1UL << 1) macro
/drivers/gpu/drm/i915/
Di915_irq.c2914 PIPE_VBLANK_INTERRUPT_STATUS); in i915_enable_vblank()
2979 PIPE_VBLANK_INTERRUPT_STATUS | in i915_disable_vblank()
4109 if (pipe_stats[pipe] & PIPE_VBLANK_INTERRUPT_STATUS && in i8xx_irq_handler()
4302 if (pipe_stats[pipe] & PIPE_VBLANK_INTERRUPT_STATUS && in i915_irq_handler()
Di915_reg.h3800 #define PIPE_VBLANK_INTERRUPT_STATUS (1UL<<1) macro
Dintel_display.c936 I915_READ(pipestat_reg) | PIPE_VBLANK_INTERRUPT_STATUS); in intel_wait_for_vblank()
940 PIPE_VBLANK_INTERRUPT_STATUS, in intel_wait_for_vblank()