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Searched refs:RADEON_CLOCK_CNTL_DATA (Results 1 – 5 of 5) sorted by relevance

/drivers/gpu/drm/radeon/
Dradeon_legacy_tv.c288 WREG8(RADEON_CLOCK_CNTL_DATA + 3, 0); in radeon_wait_pll_lock()
290 if (RREG8(RADEON_CLOCK_CNTL_DATA + 3) >= cnt_threshold) in radeon_wait_pll_lock()
Dradeon_drv.h523 #define RADEON_CLOCK_CNTL_DATA 0x000c macro
1865 RADEON_WRITE(RADEON_CLOCK_CNTL_DATA, (val)); \
Dr100.c2852 (void)RREG32(RADEON_CLOCK_CNTL_DATA); in r100_pll_errata_after_index()
2877 tmp = RREG32(RADEON_CLOCK_CNTL_DATA); in r100_pll_errata_after_data()
2890 data = RREG32(RADEON_CLOCK_CNTL_DATA); in r100_pll_rreg()
2903 WREG32(RADEON_CLOCK_CNTL_DATA, v); in r100_pll_wreg()
Dradeon_cp.c288 return RADEON_READ(RADEON_CLOCK_CNTL_DATA); in RADEON_READ_PLL()
Dradeon_reg.h345 #define RADEON_CLOCK_CNTL_DATA 0x000c macro