Searched refs:RLC_CNTL (Results 1 – 8 of 8) sorted by relevance
| /drivers/gpu/drm/radeon/ |
| D | si.c | 5153 orig = data = RREG32(RLC_CNTL); in si_halt_rlc()
5157 WREG32(RLC_CNTL, data); in si_halt_rlc()
5169 tmp = RREG32(RLC_CNTL); in si_update_rlc()
5171 WREG32(RLC_CNTL, rlc); in si_update_rlc()
5765 WREG32(RLC_CNTL, 0); in si_rlc_stop()
5774 WREG32(RLC_CNTL, RLC_ENABLE); in si_rlc_start()
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| D | r600.c | 1623 WREG32(RLC_CNTL, 0); in r600_gpu_soft_reset()
1755 WREG32(RLC_CNTL, 0); in r600_gpu_pci_config_reset()
3427 WREG32(RLC_CNTL, 0); in r600_rlc_stop()
3432 WREG32(RLC_CNTL, RLC_ENABLE); in r600_rlc_start()
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| D | sid.h | 1242 #define RLC_CNTL 0xC300 macro
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| D | cikd.h | 1349 #define RLC_CNTL 0xC300 macro
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| D | cik.c | 6134 tmp = RREG32(RLC_CNTL); in cik_update_rlc()
6136 WREG32(RLC_CNTL, rlc); in cik_update_rlc()
6143 orig = data = RREG32(RLC_CNTL); in cik_halt_rlc()
6149 WREG32(RLC_CNTL, data); in cik_halt_rlc()
6201 WREG32(RLC_CNTL, 0); in cik_rlc_stop()
6217 WREG32(RLC_CNTL, RLC_ENABLE); in cik_rlc_start()
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| D | evergreend.h | 384 #define RLC_CNTL 0x3f00 macro
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| D | r600d.h | 685 #define RLC_CNTL 0x3f00 macro
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| D | evergreen.c | 4230 WREG32(RLC_CNTL, mask); in evergreen_rlc_start()
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