Searched refs:RXIENB (Results 1 – 1 of 1) sorted by relevance
62 #define RXIENB 0x04 /* Receive Interrupt Enable */ macro92 #define UART_ALL_IRQ_DISABLE(uart) UART_REG_CLR(uart, R_STS, RXIENB|TXIENB)93 #define UART_RX_IRQ_DISABLE(uart) UART_REG_CLR(uart, R_STS, RXIENB)96 #define UART_ALL_IRQ_ENABLE(uart) UART_REG_OR(uart, R_STS, RXIENB|TXIENB)97 #define UART_RX_IRQ_ENABLE(uart) UART_REG_OR(uart, R_STS, RXIENB)292 if (status & RXIENB) { in arc_serial_isr()